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CD1_MT9V034_RAW_TRANS
基于FPGA的UDP网络图像传输实验,FPGA完成了MT9V034的RAW图像采集缓存,NIOS完成了图像的UDP封包,DM9000芯片完成了MAC和PHY的功能。(Based on the UDP FPGA network image transmission experiment, FPGA completed the RAW MT9V034 image acquisition cache, NIOS completed the image of the UDP packets, DM9000 chip MAC and PHY completed the function.)
- 2016-07-13 10:11:46下载
- 积分:1
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是vhdl语言,在fpga开发板上实现十进制技术(7段数码管显示),包括复位,清零,计数使能。...
是vhdl语言,在fpga开发板上实现十进制技术(7段数码管显示),包括复位,清零,计数使能。-Is the VHDL language, in the FPGA development board realize decimal technology (7 digital tube display), including reset, cleared, counting enable.
- 2022-03-20 12:25:41下载
- 积分:1
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texample1
32-bit shifter, shifter, 32-bit.Very goog as a study file.
- 2015-10-24 09:44:53下载
- 积分:1
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seven_persons
自己写的7人表决器的verilog程序,实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)
- 2013-08-10 07:15:06下载
- 积分:1
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一个vhdl实现的hamming码编码器
一个vhdl实现的hamming码编码器-an hamming coder using vhdl
- 2023-02-25 17:20:03下载
- 积分:1
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8b10b
ALERA fpga 8B10B转换源码,用于实现8B转10B,10B转8B功能。(ALTERA fpga 8B10B conversion source, used to achieve 8B to 10B, 10B to 8B function)
- 2020-09-13 02:07:59下载
- 积分:1
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CPU-Verilog
简单流水线CPU,使用 verilog实现,实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
- 积分:1
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123
说明: 系统介绍了数字开发系统平台FPGA设计中的部分技巧 对于FPGA开发研究人员具有一定的指导和帮助意义(Systematic introduction of digital development platform FPGA design techniques for FPGA development of some of the researchers have some sense of guidance and help)
- 2011-03-24 10:34:07下载
- 积分:1
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VerilogFreq-div
Verilog分频程序原理讲解及代码.偶数倍分频奇数倍分频的原理和方法(Verilog divide the program explain the principle and code an even multiple of odd multiple of the principle of divide and divide)
- 2013-01-21 21:45:08下载
- 积分:1
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1024point-fft--using-verilog-hdl
1024点快速傅里叶变换,使用verilog hdl硬件描述语言(1024point FFT,using verilog hdl)
- 2013-03-09 10:54:42下载
- 积分:1