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logic lock 的vhdl源码,altera平台适用。
logic lock 的vhdl源码,altera平台适用。-logic lock the VHDL source code, altera platform.
- 2023-01-30 09:50:04下载
- 积分:1
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juanji
FPGA的卷积编码小程序,VHDL描述,参数为2,1,7.(2,1,7 cov with VHDL.)
- 2010-09-24 20:28:22下载
- 积分:1
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曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0,低→ 高的跳变表示为1。每个码元中间都要发生跳变,接收端可将此变化提取...
曼彻斯特编码技术用电压的变化表示0和1。规定在每个码元中间发生跳变。高→ 低的跳变表示0,低→ 高的跳变表示为1。每个码元中间都要发生跳变,接收端可将此变化提取出来作为同步信号,使接收端的时钟与发送设备的时钟保持一致-Manchester coding techniques that use voltage changes in 0 and 1. Provisions in the middle of each symbol hopping happen. High → low hopping express 0, low → high jump for the express one. Symbol between each transition must happen, this change in the receiver can be extracted as a synchronization signal to the receiving end of the clock and send the equipment to maintain the same clock
- 2023-06-17 15:30:03下载
- 积分:1
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dds
基于DDS的信号源设计(包括三角波、正弦波、方波)(Design of signal source based on DDS)
- 2018-01-01 18:06:51下载
- 积分:1
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exercise3
用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。(Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.)
- 2013-08-30 11:12:09下载
- 积分:1
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inv_matrix
矩阵求逆模块硬件实现,用verilog语言,基于ISE开发环境(implement of inverse matrix)
- 2021-03-24 10:19:14下载
- 积分:1
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业界标准的Verilog语法格式
verilog标准语法,还有很多的样例参考,学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)
- 2020-06-15 22:50:02下载
- 积分:1
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使用CORDIC实现三角函数计算,使用VHDL语言实现
利用cordic实现三角函数的计算,用vhdl实现-use cordic achieve trigonometry calculations, using achieve vhdl
- 2022-01-20 22:30:42下载
- 积分:1
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8_sys_clock
黑金开发板对时钟信号的编写实验以及调试,相关代码如压缩包所示(CLOCK FPGA)
- 2012-09-18 22:51:36下载
- 积分:1
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multiply
由verilog编写的乘法器,通过两个文件的调用实现。由于子模块的调用使得程序简化了许多。(Prepared by the Verilog multiplier, through the realization of the two documents call. As the sub-modules to simplify the procedure call makes a lot.)
- 2008-12-30 20:51:33下载
- 积分:1