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Verilog
用Verilog实现一个基于Mesh拓扑结构的路由器网络(Using Verilog to implement a router network based on Mesh topology)
- 2021-03-25 15:49:14下载
- 积分：1
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M_SSB_100
由乘法器组成 单边带信号产生的 仿真源代码 msm (Composed of single sideband signal by the multiplier generated simulation source code msm)
- 2007-07-25 14:59:29下载
- 积分：1
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sampleverilog
图像采集、存储控制verilog源代码(Image acquisition, storage, control of Verilog source code)
- 2021-04-15 22:28:54下载
- 积分：1
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cfft_control
vhdl code for cyclic cfft control
- 2011-04-05 14:42:09下载
- 积分：1
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VGA显示汉字
基于FPGA的VGA驱动代码VHDL 在显示屏显示一个汉字-FPGA-based VHDL code of the VGA driver that a character in the display
- 2022-04-08 04:51:00下载
- 积分：1
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uart-for-fpga
说明： Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分：1
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SoC sample Code using Altera Xcaliber, good usefull SoC.
SoC sample Code using Altera Xcaliber, good usefull SoC.
- 2022-02-04 17:46:18下载
- 积分：1
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matlab程序
说明： OFDM信号的发送与接收 ，需要自取。时域图，模糊图，削峰。(Sending and receiving of OFDM signal)
- 2020-12-17 12:56:10下载
- 积分：1
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LED-clock-display
利用单片机控制LED时钟显示，以及闹钟，程序较大，但比较简单易懂。(LED clock display)
- 2013-03-10 10:15:37下载
- 积分：1
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LMS_filter
这是自适应滤波器，使用verilog代码来编写的，已通过了仿真，效果很好。希望能给大家好好分享！(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)
- 2020-12-08 21:19:19下载
- 积分：1
