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vhdl经典源代码――LCD控制，入门者必须掌握
vhdl经典源代码――LCD控制，入门者必须掌握-vhdl classical source code-- LCD control, beginners must master
- 2022-03-20 08:17:37下载
- 积分：1
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Cordic_matlab
实现自然对数运算的cordic算法的matlab浮点仿真，以及针对FPGA硬件平台的定点仿真测试(Achieve natural logarithm of cordic algorithm matlab floating point emulation, and FPGA hardware platform for fixed-point simulation testing)
- 2013-11-01 15:10:09下载
- 积分：1
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EX7_BINARY2GRAY
本模块是实现格雷码和二进制码的转换，并给出仿真测试文件(This module is to achieve the conversion of Gray code and binary code, and give the simulation test file)
- 2015-04-14 16:48:38下载
- 积分：1
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PipelineSim
一个计算机原理课程设计的作业，5级流水线CPU，指令集到代码均为自己设计，有最终报告文档，组建说明，并行除法，16位字长，定长指令，Verilog源代码，顶层设计图。结构简单，冲突解决方式也很简单，代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分：1
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FPGASPI
FPGA SPI 主要模块全部涵盖 时序解释 与DSP通信(FPGA SPI Timing interpretation covering all main modules communicate with the DSP)
- 2020-12-09 13:49:20下载
- 积分：1
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脉冲多普勒雷达回波信号相干积累的VHDL源程序
脉冲多普勒雷达回波信号相干积累的VHDL源程序-pulse Doppler radar echo signal coherent accumulation of VHDL source
- 2022-12-08 18:50:02下载
- 积分：1
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Elevator designed to control the lift design 6 original VHDL language
电梯的设计・用来控制6层的电梯设计原来・VHDL语言-Elevator designed to control the lift design 6 original VHDL language
- 2022-02-06 15:18:21下载
- 积分：1
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project_first
basys3的数字钟，可以显示00.00-59.59(Digital clock of basys3,It can display 00.00-59.59)
- 2019-06-18 10:37:53下载
- 积分：1
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hdl
网上流传的用来实现FPGA驱动VGA，从而实现一个pingpong小游戏的源码，实测可用。(a program embedded in a FPGA in order to drive the VGA and realize a little game named pingpong.
tested.)
- 2009-03-31 22:36:37下载
- 积分：1
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FPGA中按键弹跳消除模块的研究与应用，原理和例子都非常好
FPGA中按键弹跳消除模块的研究与应用，原理和例子都非常好-FPGA to eliminate bounce in key research and application modules, principles and examples are very good
- 2022-02-20 02:12:06下载
- 积分：1
