-
Verilog-HDL-tutorial
verilog HDL经典的入门书籍,内容很详细,讲了许多实例,适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)
- 2013-10-08 20:21:51下载
- 积分:1
-
标准SDR SDRAM控制器参考设计,Lattice提供的verilog源代码
标准SDR SDRAM控制器参考设计,Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
- 2022-03-18 08:05:11下载
- 积分:1
-
pal制视频的显示
代码来源http://www.spacewire.co.uk/video.html,需要CRT显示ITU.656格式的视频的可以参考
- 2022-06-02 03:09:20下载
- 积分:1
-
protel library 2 in fpga package, very difficult to find the
protel中fpga封装库2,非常难找的-protel library 2 in fpga package, very difficult to find the
- 2022-07-03 08:50:31下载
- 积分:1
-
ces_svtb_2011.12
synopse sv培训lab,是学习systemverilog非常好的资料,放心下载。(synopsis sv training lab)
- 2021-04-19 11:18:51下载
- 积分:1
-
liushuideng
使用430的四系点亮流水灯,内置有时钟函数,函数简单,值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)
- 2013-08-31 15:23:06下载
- 积分:1
-
基于FPGA的交通控制器
设计一个由一条主干道和一条支干道的汇合点形成的十字交叉路口的交通灯控制器: 1) 主、支干道各设有3个方向的绿、黄、红指示灯(左转、直行和右转),每个行驶方向均配有时间显示数码管;2) 主干道处于常允许通行状态,而支干道有车来才允许通行(由外部信号通知)。3) 当主、支道均有车时,两者交替允许通行,主干道每次放行90s,支干道每次放行60s,在每次由亮绿灯变成亮红灯的转换过程中,要亮5s黄灯作为过渡,并进行减计时显示。
- 2022-02-26 08:00:04下载
- 积分:1
-
03-verilog-11
Verilog reference book
- 2015-02-06 09:03:48下载
- 积分:1
-
Decodificador
System Verilog decodificator.
Enters a value(binary), drops hundreds, tens and units in BCD
- 2013-05-15 02:11:45下载
- 积分:1
-
main
完整的GMSK调制及维特比译码,程序中包括了高斯滤波器的设计,调制相位的计算,并采用了维特比译码算法解调出原始码元,最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分:1