-
Verilog_code_for_AWGN
说明: verilog实现awgn信道噪声的代码,支持可变的信噪比。利用移位寄存器来实现伪随机序列。(verilog code for implementation of awgn channel noise. support variable snr. use LSFR to implement the pseudo random sequence. )
- 2021-01-14 16:48:47下载
- 积分:1
-
实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。...
实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
- 2022-01-23 10:41:40下载
- 积分:1
-
shockware
VHDL 波形防止抖动程序,学习试验材料(VHDL prevent jitter waveform procedures, the pilot study materials)
- 2007-03-01 13:15:37下载
- 积分:1
-
UART_Test
OMAP5912 UART的测试程序 包括头文件 源文件等。(OMAP5912 UART program test)
- 2011-08-14 16:04:03下载
- 积分:1
-
计数器的 vhdl 代码
我们使用此代码开发 plc 在 fpga 硬件计数器的程序
- 2023-02-08 13:05:03下载
- 积分:1
-
SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps...
SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps
- 2023-01-21 19:35:04下载
- 积分:1
-
A_PUF_Design
基于fpga的物理不可克隆函数(PUF)模块的实现(A PUF Design for Secure FPGA-Based Embedded Systems)
- 2014-06-28 15:37:44下载
- 积分:1
-
数字波形存储器VHDL源码,基于Quartus II开发。
数字波形存储器VHDL源码,基于Quartus II开发。-Digital waveform memory VHDL source code, based on the Quartus II development.
- 2022-01-26 14:31:04下载
- 积分:1
-
CycloneII_NiosII_2C35_Rev02_DB_SCH
说明: nios开发板电路图CycloneII_NiosII_2C35_Rev02_DB_SCH.zip(nios development board circuit CycloneII_NiosII_2C35_Rev02_DB_SCH.zip)
- 2010-03-28 20:50:27下载
- 积分:1
-
verilog.HDL.examples
许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等(many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.)
- 2020-06-26 04:40:02下载
- 积分:1