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my_or
verilog 或门程序 初学者必备。。。。。。。。。。。。(verilog )
- 2009-05-26 16:07:42下载
- 积分:1
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xapp953
Two-Dimensional Rank Order Filter
Author: Gabor Szedo
- 2012-05-15 02:50:41下载
- 积分:1
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Serial to parallel conversion code
用于串行到并行数据转换器的VHDL代码;当输入数据是串行的时,该代码是用于许多应用程序的位到字节转换的VHDL代码形成代码使用基于FPGA的LUT和D-RAM来存储数据,然后用时钟推送字节对齐的数据。
- 2022-08-08 20:52:36下载
- 积分:1
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7_to_1-LVDS-dispaly-from-FLASH
该代码是基于verilog 实现的代码,可以用于对接受1080P的LVDS视频数据并处理后显示到各种规格的LCD屏幕上,且支持从FLASH中读取BMP的图片数据并实时显示到LCS屏幕(The code is based on the code verilog achieve, it can be used for receiving LVDS 1080P video and data processing displayed on a variety of LCD screen, and support for reading data the FLASH BMP images and real-time display to the LCS screen)
- 2016-02-18 14:06:22下载
- 积分:1
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Sequence Detection VHDL source code, ATERA platform compile. Report detailed des...
序列检测VHDL源代码,ATERA平台编译。详细的报表说明和模拟源代码。
- 2022-10-18 04:30:03下载
- 积分:1
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16 point radix 2
使用 c languageit 的 16 点基 2 fft 代码将 16 点时间域序列转换为频率域
- 2022-10-05 23:25:03下载
- 积分:1
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基于VHDL的I2C程序0005,很不错的论文及程序,,大家快下啊
基于VHDL的I2C程序0005,很不错的论文及程序,,大家快下啊-based on the I2C procedures VHDL 0005, a very good paper and procedures, we quickly under ah
- 2022-03-18 17:11:42下载
- 积分:1
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jtag
verilog语言编写的jtag(边界扫描模块),初学的时候可以看看(verilog language jtag (boundary scan module), a novice when you can look)
- 2021-04-27 14:38:44下载
- 积分:1
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en.SPI_EEPROM_Verilog_models_V10
spi接口的eeprom模型,型号为st公司m65pxx(The eeprom model of spi interface is st company m65pxx)
- 2021-01-19 14:28:44下载
- 积分:1
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regress-900055
The Date prototype object is itself a Date object (its [[Class]] is "Date") whose value is NaN.
- 2013-12-27 00:29:58下载
- 积分:1