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基于FPGA数字频率计
基于FPGA数字频率计，VHDL，quartus，8位频率显示，精确度高
- 2022-03-07 18:22:47下载
- 积分：1
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VHDL language is designed to be simple to use the CPU, the focus of the design o...
用VHDL语言设计简单的CPU，重点设计微操作代码，然后设计CPU各组成模块，最后根据设计的微操作设计微指令，验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.
- 2022-01-26 04:06:25下载
- 积分：1
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Altium_Package_LMH0340
Altium Reference design for LMH0340 test bed and design
- 2013-05-11 04:21:35下载
- 积分：1
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QPSK_System
实现QPSK系统的调制解调仿真，基带成形滤波器采用升余弦滚降滤波器，将仿真的误码率与理论误码率作了比较(Implement QPSK modulation and demodulation simulation system, the baseband shaping filter using Raised Cosine filter will BER simulation were compared with the theoretical BER)
- 2020-12-22 15:39:07下载
- 积分：1
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一个异步FIFO的verilog实现论文
一个异步FIFO的verilog实现论文-err
- 2022-01-28 06:08:18下载
- 积分：1
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这是led流水灯的vhdl描述，很好的啊
这是led流水灯的vhdl描述，很好的啊-led s hdl describe
- 2022-07-02 00:45:42下载
- 积分：1
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EDAcodelock
能够在EDA环境下实现四位十进制数字密码锁的设置与开锁功能，并能更改使用密码，还可以防止抖动(EDA environment to achieve four decimal code lock and unlock function of the settings and change the use of passwords, but also to prevent the jitter)
- 2009-05-07 09:44:30下载
- 积分：1
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Manchester-code-of-VHDL-program
利用FPGA实现硬件的VHLD语言的Manchester code。(Hardware implementation using FPGA VHLD language Manchester code.)
- 2013-07-14 22:08:25下载
- 积分：1
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ppmencoder
一个八位的并行输入，串行输出的编码器；带有开头结尾帧。(It is an encode with eight palallel input and a serial output.)
- 2020-11-23 01:19:34下载
- 积分：1
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能够实现8位的无符号数的乘除法，模拟了笔算的过程
- 2022-12-11 10:00:03下载
- 积分：1
