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本代码实现了486总线的功能,初学者可以借鉴学习
本代码实现了486总线的功能,初学者可以借鉴学习-This code implements the 486 bus functions, beginners can learn to learn
- 2023-09-05 01:20:03下载
- 积分:1
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用verilog编写的网卡芯片rtl级。前仿后仿都通过了,可以在modelsim上运行察看...
用verilog编写的网卡芯片rtl级。前仿后仿都通过了,可以在modelsim上运行察看-verilogrtl After the former imitation through imitation, it can run on the look modelsim
- 2022-09-01 11:30:03下载
- 积分:1
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FREEDEV数字应用开发板上的I2C总线IP核的verilog描述
FREEDEV数字应用开发板上的I2C总线IP核的verilog描述-FREEDEV digital application development board I2C bus IP core verilog description of
- 2022-03-28 16:58:18下载
- 积分:1
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vhdl
说明: vhdl常见小实验代码,包括二进制比较器,4选1,8421十进制,8421转化成格雷码,8421余三码,分频器,数据码译码器,二进制减计数器,四位环形计数器等(VHDL common small experiment code)
- 2020-06-24 13:00:02下载
- 积分:1
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bt656_decode
说明: 将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)
- 2021-01-28 10:38:35下载
- 积分:1
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leadingzero
使用并行结构对32位数据进行前导零检测,使用Verilog编程(Use parallel structure to the 32-bit data, leading zero detection, using Verilog Programming)
- 2010-05-12 10:48:36下载
- 积分:1
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Labview-Data-acquisition-card-
基于labview的数据采集系统,包括示波器和函数信号发生器,可以实现简单数据采集.(Labview-based data acquisition system, including oscilloscopes and function signal generator, can achieve a simple data acquisition.)
- 2014-01-15 21:26:04下载
- 积分:1
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- 2022-01-26 03:14:33下载
- 积分:1
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performance-of-pcie
本白皮书探讨了在PCI Express的因素
技术可能会影响性能。它还
提供指导如何估算
的系统性能。(This white paper explores the factors in PCI Express technology may affect performance. It also provides guidance on how to estimate the system performance.)
- 2013-10-29 10:52:43下载
- 积分:1
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利用VHDL语言设计一个分频器,输入为CLK,输出分别为CLK1、CLK8、CLK256、 CLK1024...
利用VHDL语言设计一个分频器,输入为CLK,输出分别为CLK1、CLK8、CLK256、 CLK1024-The use of VHDL language design a divider, input CLK, the output respectively, CLK1, CLK8, CLK256, CLK1024
- 2022-06-02 16:58:00下载
- 积分:1