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spi_test
说明： 基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)
- 2020-06-20 21:00:01下载
- 积分：1
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08_4_hdmi_loop
说明： HDMI做为视频输出输入接口已经广泛使用很长时间，主要通过TMDS差分编码传输。本实验通过在HDMI屏幕上显示彩条和输入输出环通实验，来练习视频的时序和视频颜色的表示，为后面视频处理实验做个基础。(HDMI as video output input interface has been widely used for a long time, mainly through TMDS differential coding transmission. In this experiment, by displaying color bars and input/output loop experiments on HDMI screen, video timing sequence and video color representation are practiced to lay a foundation for video processing experiments later)
- 2020-06-17 09:00:02下载
- 积分：1
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sram_sp_hse_8kx8
SRAM 8K*8 芯片存储器 芯片存储器 芯片存储器(SRAM 8K*8
Chip memory
Chip memory)
- 2018-08-26 18:50:04下载
- 积分：1
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Verilog HDL系列和转换的准备。我用电流输出类型。股份有限公司...
Verilog HDL编写的串并转换。采用iout类型口。包含源文件和测试文件。用Modsim编译。-Verilog HDL Series and the preparation of the conversion. I used iout types. Includes source and test papers. Modsim compiler used.
- 2022-06-18 11:27:00下载
- 积分：1
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project1
音乐计算器的设计与实现。完成加减与或比较计算，能显示进位借位零位，能根据结果的正负发出两首不同的音乐。(Design and implementation of music calculator. Complete addition and subtraction and comparison calculation, can display carry and borrow zero, can send out two different music according to the positive and negative results.)
- 2020-08-16 23:38:25下载
- 积分：1
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Simulation using VHDL language songs Andy Lau
用VHDL语言仿真歌曲刘德华的《月老》
-Simulation using VHDL language songs Andy Lau
- 2023-08-15 11:20:05下载
- 积分：1
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(Oxford)-Computer-Arithmetic--Algorithms-a-Hardwa
Computer Arithmetic (press 2000)
- 2012-01-27 09:45:29下载
- 积分：1
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function_automatic
Verilog使用automatic function的範例(Verilog example of the use of the automatic function)
- 2009-06-18 12:01:30下载
- 积分：1
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该程序实现的N位全减器，首先实现一位的减法器，之后实现N位全减器。...
该程序实现的N位全减器，首先实现一位的减法器，之后实现N位全减器。-Program of the N-bit-wide reduction, the first realization of a subtraction for, after all N-reduction devices.
- 2022-02-25 19:13:43下载
- 积分：1
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步进电机位置系统
步进电机位置系统block symbol file
步进电机位置系统的Verilog HDL程序设计
已编译通过
步进电机位置系统
步进电机位置系统block symbol file
步进电机位置系统的Verilog HDL程序设计
已编译通过-Stepper motor stepper motor position location system system block symbol file location stepper motor system Verilog HDL program design has been compiled through
- 2022-04-25 13:54:32下载
- 积分：1
