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cmos-Digital-design
The deep lecture notes for basic digital system for cmos design
- 2012-07-29 17:51:26下载
- 积分:1
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FFT_verilog
verilog 实现的FFT 流水线操作,速度能达到200M(verilog pipelining the FFT implementation, the speed can reach 200M)
- 2021-03-23 09:29:15下载
- 积分:1
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vhdl
New files for pudn website
- 2018-06-30 07:30:02下载
- 积分:1
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ad9226test
使用CycloneIV芯片,实现对高精度ADCad9226的数据采集。内有详细代码说明,并附有调试结果(Use CycloneIV, to achieve high-precision data acquisition ADCad9226. Along with debugging results)
- 2014-08-15 16:18:33下载
- 积分:1
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DATA_Scramble
扰码器的FPGA实现,选择的扰码器规格为15位移位寄存器。(FPGA scrambler, scrambler specifications for a 15 bit shift register.)
- 2021-01-16 19:28:46下载
- 积分:1
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sound_ranging
改VHDL代码可以实现超声波测距的功能,其精确度达到US级,可以用七段数码管显示其数值(sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging sound ranging )
- 2014-06-13 20:42:03下载
- 积分:1
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a cycle ruduandency code
实现一个循环冗余码,是老师给的例子,别的同学已经验证-a cycle ruduandency code
- 2023-04-27 23:30:03下载
- 积分:1
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vhdl抗抖动滤波器的设计,包括完整的工程
vhdl抗抖动滤波器的设计,包括完整的工程-VHDL anti-jitter filter design, including the complete works
- 2022-04-26 19:29:03下载
- 积分:1
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一个8X8的矩阵键盘的VHDL文件,并且有长安键和短按键之分,即一共能做到128个键值,扫描用的时钟用1ms的就行了...
一个8X8的矩阵键盘的VHDL文件,并且有长安键和短按键之分,即一共能做到128个键值,扫描用的时钟用1ms的就行了-A 8x8 matrix keyboard VHDL files and have Changan and short keys of key points, namely, to achieve a total of 128 keys, scanning with the clock used on the list of 1ms
- 2022-08-14 17:54:21下载
- 积分:1
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完成十余卷积过程,简单方便,能够这样那样这样,sorry
完成十余卷积过程,简单方便,能够这样那样这样,sorry-Convolution process more than a decade to complete, simple and convenient, this can be done this way, sorry
- 2022-10-31 06:20:03下载
- 积分:1