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goodProcessor.srcs
说明: 处理器系统,处理器加上存储器,从存储器取出指令放入处理器执行(processor system, instructions stored in ROM, a counter generate address and the processor execute instructions.)
- 2020-10-10 23:10:02下载
- 积分:1
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Asqare
用fpga实现的连连看游戏,功能还不完善,不过可以借鉴。(Realize with FPGA Lianliankan game, function is not perfect, but can be used for reference.)
- 2012-08-27 18:39:59下载
- 积分:1
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VHDL的寄存器读写参考,可自己根据要求重新修改,本示范只做参考用...
VHDL的寄存器读写参考,可自己根据要求重新修改,本示范只做参考用-Register read and write VHDL reference to their request to amend in accordance with, the reference model only
- 2022-09-23 06:45:03下载
- 积分:1
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基于fpga和xinlinx ise的小游戏的vhdl程序,希望对你有所帮助!
基于fpga和xinlinx ise的小游戏的vhdl程序,希望对你有所帮助!-xinlinx and they simply based on the small game and ideally the VHDL process, and I hope to help you!
- 2022-03-13 03:44:13下载
- 积分:1
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C54x is the Verilog code opencoreip
c54x的VeriLog程序代码
也是opencoreip-C54x is the Verilog code opencoreip
- 2022-03-26 18:08:34下载
- 积分:1
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UART模块用VHDL。
用VHDL语言编写的串口通讯模块,可以实现发送和接受功能。-A UART module writen in VHDL.
- 2022-12-24 06:35:03下载
- 积分:1
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a_sistolic_FFT_architecture_for_FPGA
Description of a sistolic arhictecture for a FFT implementation in FPGA.
- 2009-03-24 18:12:27下载
- 积分:1
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golomb编码,用于无损图像压缩等,基于quartusii平台。
golomb编码,用于无损图像压缩等,基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
- 2022-02-15 20:55:31下载
- 积分:1
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UART_CESHI
基于VHDL语言的串口发送和接收程序,自己调试通过,并已经运用在工程中(Based on the serial port to send and receive procedures VHDL language, its own debugging, and has been used in the project)
- 2016-08-05 15:27:54下载
- 积分:1
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CPU-Verilog
说明: 简单流水线CPU,使用 verilog实现,实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
- 积分:1