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costas_DPSK
采用costas环进行DPSK解调的程序。输入数据速率2.4Kbps,载波频率12KHz,采样率1.6MHz, 输入数据位宽12位,快捕带为799.617Hz(Costas ring using DPSK demodulation process. Input data rate 2.4Kbps, carrier frequency 12KHz, sampling rate 1.6MHz, the input data 12 bits wide, fast catching band is 799.617Hz)
- 2014-06-09 21:50:42下载
- 积分:1
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乐曲硬件演奏电路设计的全部VHDL代码,在QuartusII环境下编译通过,已存在QuartusII项目...
乐曲硬件演奏电路设计的全部VHDL代码,在QuartusII环境下编译通过,已存在QuartusII项目-err
- 2022-02-26 18:04:41下载
- 积分:1
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这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!...
这是我在学习过程中编的数字钟的原程序,含各种时钟模块,以及计数器,累加器等,可以直接下载,已经编译通过!-This is my learning process in the middle of the 10-minute program, containing various clock module and the counter, accumulator, and can download, compile!
- 2022-07-19 00:32:21下载
- 积分:1
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Driver-for--Agilent
本程序用以驱动安捷伦频谱仪和脉冲信号发生器,以产生格雷码波形。(It is aim to driver the PSG and ESA to generate Golay.)
- 2013-01-17 15:28:20下载
- 积分:1
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This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Educati...
This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
- 2022-02-12 08:59:26下载
- 积分:1
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Hexadecimal to 7 segments
Hexadecimal to 7 segments
- 2022-03-07 14:40:55下载
- 积分:1
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svpwm
空间矢量调制脉冲的产生。
感应电动机的 VHDL 代码
- 2022-07-13 19:14:01下载
- 积分:1
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dianzhen
fpga实验板上16*16点阵显示汉字的程序-翻译结果fpga实验板上16*16点阵显示汉字的程序(Experimental fpga board 16* 16 dot matrix display Chinese program- translation results fpga experimental board 16* 16 dot matrix display Chinese characters in the program)
- 2013-12-24 16:28:00下载
- 积分:1
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qam_64
Verilog语言下QAM调制的DDS实现(The QAM Modulation DDS achieve)
- 2021-02-20 11:59:43下载
- 积分:1
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2011-diansai-E
2011年 电赛 E题 简易数字信号传输性能分析仪FPGA信号发生部分 包括m序列,伪随机序列,曼彻斯特编码 程序 和单片机部分程序(2011 CEC E title simple digital signal transmission performance analyzer FPGA signal part of the program and single-chip part of the program)
- 2012-02-23 10:11:07下载
- 积分:1