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Verilog--image-sample
基于Verilog的图像采集、处理和存储程序,初学者参考,高手绕道。(Verilog-based image acquisition, processing and storage procedures, beginners reference, master bypass.)
- 2021-04-16 11:48:54下载
- 积分:1
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这个信息有100个实例,是一个很好的学习参考。对于那些水
本资料中有100个vhdl的例子,是很好的学习参考资料。对于学习vhdl的人来说是很有用的。-This information has 100 vhdl example, is a good learning reference. For those who learn vhdl is very useful.
- 2022-01-23 10:02:48下载
- 积分:1
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How to Connecting Xilinx FPGAs to the Philips
How to Connecting Xilinx FPGAs to the Philips
- 2022-08-14 17:50:57下载
- 积分:1
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alu
the 8 bit alu by verilog
- 2011-05-26 11:25:43下载
- 积分:1
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16/64 点 FFT
这是通过使用 VHDL 代码的 FFT 库函数。它可以切换的 FFT 16 点和 64 点之间的长度。它包含蝴蝶、捻因子、 ROM、 RAM 和等等。它可以成功运行在 Quartus 2 或其他软件上。
- 2022-03-13 13:35:13下载
- 积分:1
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4位电子密码锁,带键盘扫描、按键防抖动、LCD驱动编译码
4位电子密码锁,带键盘扫描、按键防抖动、LCD驱动编译码-four electronic password lock with a keyboard scan button shake, LCD driver encryption
- 2022-05-10 17:31:17下载
- 积分:1
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VMD642_CPLD
本例程位于 VMD642_CPLD目录中。
使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使
用 Verilog HDL书写,编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)
- 2013-09-13 13:59:52下载
- 积分:1
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-------
---- WISHBONE Wishbone_BFM IP Core----
--------
---- This file is par
---- ----
---- WISHBONE Wishbone_BFM IP Core ----
---- ----
---- This file is part of the Wishbone_BFM project ----
---- http://www.opencores.org/cores/Wishbone_BFM/ ----
---- ----
---- Description ----
---- Implementation of Wishbone_BFM IP core according to ----
---- Wishbone_BFM IP core specification document.---------
---- WISHBONE Wishbone_BFM IP Core----
--------
---- This file is part of the Wishbone_BFM project----
---- http://www.opencores.org/cores/Wishbone_BFM/----
--------
---- Description----
---- Implementation of Wishbone_BFM IP core according to----
---- Wishbone_BFM IP core specification document.
- 2022-05-26 15:36:06下载
- 积分:1
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zuse
验证阻塞赋值与非阻塞的赋值赋值过程的先后顺序(Verification of the order of assignment and non blocking assignment)
- 2017-12-18 17:04:23下载
- 积分:1
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keyboard
用FPGA单片机软核实现键盘扫描,键盘为4X4矩阵键盘,输入相应键值,用数码管显示-keyboard
- 2022-05-20 15:47:09下载
- 积分:1