-
my_lms
自适应滤波,对输入信号进行选择性的加权处理,使输出达到最优化,并且能够跟踪和适应系统和环境的动态变化(Least mean square,of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)
- 2010-10-14 15:30:00下载
- 积分:1
-
vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍
vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍-VHDL source习laugh Yang, Yi bleed at the nose cavity submerged stresses measured tungsten Daitou VHDL, VHDL-Qin Pang Yang cavity cavity Geng Zhuang
- 2023-07-17 16:40:03下载
- 积分:1
-
VHDLexamples
这里面有很多的vhdl的编程的源代码,文件是全英文的,例子丰富(That there are a lot of vhdl programming source code, documentation is in English, and examples of rich)
- 2010-07-13 11:00:53下载
- 积分:1
-
div_fru
介绍分频器的好资料。不光有奇数分频、偶数分频,还有小数分频。相信把这个资料理解透了后以后分频器的设计就不是问题了。(Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.)
- 2010-06-17 21:52:55下载
- 积分:1
-
digital-system-design
基于VHDL语言的七段显示管程序, 实现9个数字循环 并且能控制播放速度(SEVEN SEGMENT DISPLAY)
- 2011-02-14 21:02:38下载
- 积分:1
-
divisor
Time divisor vhdl code
- 2009-06-02 21:31:05下载
- 积分:1
-
Verilog代码转换到AHB总线APB
verilog code for apb to ahb convert
- 2023-04-27 12:35:03下载
- 积分:1
-
Single-CPU
说明: 简单的单周期CPU设计,实现的指令有:算术运算指令、逻辑运算指令、移位指令、比较指令、存储器读/写指令、分支指令、跳转指令、停机指令。(Simple single-cycle CPU design,The instructions implemented are as follows:Arithmetic operation instruction, logical operation instruction, shift instruction, comparison instruction, memory read/write instruction, branch instruction, jump instruction, stop instruction.)
- 2020-06-16 12:28:32下载
- 积分:1
-
VHDL与Verilog的比较
VHDL与Verilog的比较-VHDL and Verilog comparison
- 2022-04-14 10:03:59下载
- 积分:1
-
a vhdl_program used for flat detect
平坦度检测中的高度检测算法,使用ISE开发环境,语言为VHDL,平台是XC3S4-a vhdl_program used for flat detect
- 2022-01-27 09:06:50下载
- 积分:1