-
计数器的 vhdl 代码
我们使用此代码开发 plc 在 fpga 硬件计数器的程序
- 2023-02-08 13:05:03下载
- 积分:1
-
32bit_multiply
包含32为乘法器的设计,用verilog语言实现,包括booth编码的实现,booth乘法器的实现,3_2压缩器的实现,4_2压缩器的实现,华伦斯树的实现,以及两个testbench文件用于测试。(Contains 32 multiplier design, verilog language, including booth encoding implementations, booth multiplier implementations, 3_2 compressor implementation 4_2 compressor to achieve and realize China Clarence tree, and two testbench file with the to the test.)
- 2015-01-18 21:20:48下载
- 积分:1
-
buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键...
buffer_display是4X4KEYPAD的输出显示模块。可以显示6个连续的按键-buffer_display is 4X4KEYPAD output module. It showed six consecutive Press
- 2022-12-12 05:35:03下载
- 积分:1
-
(15-7-2)BCH
Verilog HDL 语言编写的(15,7,2)BCH编码和译码功能(Verilog HDL language (15,7,2) BCH encoding and decoding functions)
- 2020-10-29 11:19:57下载
- 积分:1
-
100例VHDL语言解释,北京理工大学毕业…
VHDL语言100例详解,北京理工大学ASIC研究生出版,这里是21-50个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here are 21-50 months
- 2023-02-09 05:20:03下载
- 积分:1
-
UMC_90nm_1P9M_LOGIC_MIXED_MODE_Process_TLR_V1.1
UMC 90nm design kit. please read before using thee models.
- 2013-02-02 11:24:38下载
- 积分:1
-
fpga 基于FPGA的mif文件创建与使用
fpga 基于FPGA的mif文件创建与使用-fpga FPGA-based mif file creation and use of
- 2022-02-06 23:23:12下载
- 积分:1
-
FPGA的存储器代码的VHDL,verilog描述及测试代码
FPGA的存储器代码的VHDL,verilog描述及测试代码-FPGA memory code VHDL, verilog description and test code
- 2022-06-01 08:26:45下载
- 积分:1
-
application-in-card-and-servo-drive
AB相编码器解码接口_PWM输出SOPC方案及其在运动控制卡和伺服驱动器中的应用(AB phase encoder decoder interface _PWM output SOPC program and its application in motion control card and servo drive)
- 2012-03-22 12:44:52下载
- 积分:1
-
MD5
哈希算法FPGA实现代码,采用MD5算法,并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)
- 2020-07-03 00:40:02下载
- 积分:1