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gray_counter_vhd
ldpc verilog code has been descripted in this program
- 2017-12-06 01:05:36下载
- 积分:1
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ad1000芯片配置及数据同步代码
MXT2021是一款双通道、 低功耗、 高性能的CMOS模数转换器。芯片 采用单电源1.9V供电,
采样精度为12位,单通道采样率为1.0GSPS,典型功耗为3.14W。 芯片采用本单位创新研制的
高速采样/保持技术、高速模数信号转换技术及自动校准技术,保证器件的高速度和高动态特
性。 为方便PCB板设计和后级FPGA/ASIC数据采集, MXT2021提供可通过SPI编程配置的LVDS
接口。
- 2022-01-26 06:14:15下载
- 积分:1
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4ASKmod2
讲述4ASK的原理并附有matlab调制解调的源码。。。。。。。。。。
注:原来上传的4ASKmod.zip不要下(The principle tells 4ASK together with modulation and demodulation matlab source. . . . . . . . . . Note: The original upload 4ASKmod.zip not down)
- 2013-07-10 00:01:10下载
- 积分:1
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sim_uart
uart 收发器 verilog 代码,实现自收发功能
sys clk = 25m, baud 9600 停止位1, 无校验位;
代码实现了串口自收发功能,及把从 PC 收到的内容都发送会 PC, 其他波特率,自行修改代码即可,在 alter 的FPGA 上调试通过;
(verilog code uart transceiver to achieve self-transceiver function sys clk = 25m, baud 9600 1 stop bit, no parity code from the transceiver features a serial port, and the contents received from the PC will send the PC, another Potter rate, self-modifying code can, in the alter of the FPGA, debugging through )
- 2010-10-10 21:49:46下载
- 积分:1
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MUX
Multipleksor
3 to 1 - 3x1bit in, 1x1bit out
- 2013-09-18 16:21:25下载
- 积分:1
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CH03_RGMII_UDP_TEST
基于RGMII的UDP网络数据通信,学习FPGA的千兆以太网通信(RGMII based UDP network data communication, learning FPGA Gigabit Ethernet communications)
- 2017-09-11 23:04:19下载
- 积分:1
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pipelined_fft_256
verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)
- 2017-06-28 21:56:53下载
- 积分:1
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basic_cpu_mano_ise_vhdl
morris mano basic vhdl code in ise
- 2014-01-13 05:52:01下载
- 积分:1
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fpga
说明: 中科院FPGA的课件!纯英文,比较简单,适合刚刚接触FPGA的小白!(Chinese Academy of Sciences FPGA courseware! Pure English, relatively simple, suitable for Xiaobai who just came into contact with FPGA!)
- 2020-03-19 14:19:16下载
- 积分:1
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四位密码锁
4位密码锁,可设置密码,三次密码错误后,锁死,密码错误报警,密码错误红灯亮,密码正确绿灯亮,基于FPGA实现,Cyclone II EP2C35F672C6 仅供参考
- 2022-01-26 07:59:07下载
- 积分:1