-
example
一个电子秒表，最大显示59.99,具有暂停和reset功能(An electronic stopwatch, the maximum display 59.99, with a pause and reset functions)
- 2013-12-17 12:28:14下载
- 积分：1
-
resolutionquartusII
用verilog编写的分辨率提高的源代码 采用双线性插值(Written resolution with the verilog source code to improve the use of bilinear interpolation)
- 2021-05-14 18:30:02下载
- 积分：1
-
multiplier.tar
用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)
- 2021-04-14 13:18:55下载
- 积分：1
-
使用vhdl语言实现对led的控制，还有电路仿真
使用vhdl语言实现对led的控制，还有电路仿真-Using vhdl language implementation of the led control, as well as circuit simulation
- 2022-03-12 11:40:55下载
- 积分：1
-
CH2CH1VHDL 数字电路参考书所有程序3
CH2CH1VHDL 数字电路参考书所有程序3-CH2CH1VHDL digital circuit reference all three procedures
- 2022-05-29 17:53:40下载
- 积分：1
-
an example HDL
an example HDL-Core with any basic gates.
- 2022-12-05 05:05:03下载
- 积分：1
-
A simple sequential lights
A simple sequential lights
- 2022-08-17 06:37:02下载
- 积分：1
-
8位大小比较器的VHDL源代码，Magnitude Comparator
VHDL description of a 4...
8位大小比较器的VHDL源代码，Magnitude Comparator
VHDL description of a 4-bit magnitude comparator with expansion inputs-eight compared with the size of the VHDL source code, Magnitude Comparator VHDL description of a 4-bit magnitude comparator inputs with expansion
- 2023-07-28 13:55:03下载
- 积分：1
-
this come from alter ,you can look and find it on line about USB
this come from alter ,you can look and find it on line about USB
- 2023-09-06 16:15:03下载
- 积分：1
-
cordic_verilog
cordic算法的verilog 语言实现，注释详细，资料齐全，实现了cordic算法的各个功能，可以计算正余弦(cordic algorithm verilog language, detailed notes, and complete information)
- 2020-06-29 16:20:02下载
- 积分：1
