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sdram_module3
能够实现16位的SDRAM的读写，没有仿真文件，只有SDRAM读写的源代码，用Verilog编写(can complete read or write sdram， only include Verilog code and no simulation files)
- 2013-11-25 12:43:11下载
- 积分：1
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05_key_test
fpga key test 入门 xilinx 黑金的板子(fpga key test xilinx)
- 2017-07-27 09:27:58下载
- 积分：1
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labview-filter
数字滤波器包含IIR数字滤波器和FIR数字滤波器。本设计的工作主要是Labview软件部分，包括信号生成模块、滤波模块、显示模块的设计(IIR digital filter comprises a digital filter and FIR digital filters. The design work is mainly Labview software parts, including signal generation module, filter module, display module design)
- 2014-06-05 22:22:37下载
- 积分：1
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verilog-ethernet
说明： Collection of Ethernet-related components for gigabit, 10G, and 25G packet processing (8 bit and 64 bit datapaths). Includes modules for handling Ethernet frames as well as IP, UDP, and ARP and the components for constructing a complete UDP/IP stack. Includes MAC modules for gigabit and 10G/25G, a 10G/25G PCS/PMA PHY module, and a 10G/25G combination MAC/PCS/PMA module. Includes various PTP related components for implementing systems that require precise time synchronization. Also includes full MyHDL testbench with intelligent bus cosimulation endpoints.
- 2021-04-17 23:38:52下载
- 积分：1
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verilog实现的“状态机实现AD574数模转换”
verilog实现的“状态机实现AD574数模转换”-verilog to achieve a " state machine to achieve AD574 digital-analog conversion"
- 2023-01-02 18:45:07下载
- 积分：1
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dcfifo_design_example
ALTERA发布的内部FIFO读写示例，很有参考价值，对初学者会有一定的帮助(ALTERA' s internal FIFO read and write examples of great reference value, there will be some help for beginners)
- 2010-11-13 23:31:11下载
- 积分：1
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design of 1-bit memory using cmos logic
&单元格
- 2022-02-04 02:43:34下载
- 积分：1
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PS2 source VHDL, and can be connected directly to the computer. So the mouse, ke...
PS2的源代码VHDL语言实现，可以和计算机直接连接．做鼠标键盘接口．-PS2 source VHDL, and can be connected directly to the computer. So the mouse, keyboard interface.
- 2022-11-10 10:10:04下载
- 积分：1
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FPGA-matrix
任意维数矩阵求逆的fpga实现，矩阵求逆是矩阵运算中最重要且最难实现的一种运算(fpga implementaion of matrix inverse of any dimension)
- 2014-09-30 20:07:51下载
- 积分：1
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680605rece_7E
hdlc协议的相关程序，用verilog语言编写，供大家交流学习(hdlc protocol procedures using Verilog language for the exchange of learning)
- 2013-01-18 00:53:58下载
- 积分：1
