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BCH3
BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)
- 2021-01-26 11:58:36下载
- 积分:1
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作者:新舜唐日期:2008
--author: Suntion Tang
--date: 2008-6-7
-- two warning
--modify: By Suntion Tang at 2008-6-14
--description: 顶层文件,由于此系统简单,
-- 且底层文件不多,故放弃原理图描述,采用VHDL语言描述-author: Suntion Tang date: 2008-6-7 two warning modify: By Suntion Tang at 2008-6-14 description: the top-level documents, as a result of this system is simple, and not more than the bottom of a document, they give up the schematic description of the use of VHDL language description
- 2022-04-23 09:59:29下载
- 积分:1
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can_init
说明: 通过SPI接口实现FPGA和MCP2515独立CAN芯片通信,功能使用modelsim仿真,实现了配置、接收、发送功能。(The communication between FPGA and MCP2515 independent can chip is realized by SPI interface. The function is simulated by Modelsim, and the function of configuration, receiving and sending is realized.)
- 2020-12-30 09:28:59下载
- 积分:1
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DCT_2D
二维DCT,FPGA实现JPEG压缩中的二维DCT(dct)
- 2020-12-02 18:39:25下载
- 积分:1
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ARM-Verilog-HDL-IP-CORE
ARM处理器的IP核,用verilog编写的,对处理器和相关的CPU架构知识有很大帮助。(ARM processor IP core, written in verilog processor and CPU architecture knowledge.)
- 2020-09-21 10:27:52下载
- 积分:1
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一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码
一种基于格雷码的异步FIFO设计与实现,8*8位的fifo VHDL 源码-Gray-code based on the Asynchronous FIFO Design and Implementation
- 2022-08-23 15:10:52下载
- 积分:1
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XAPP134_SDRAM_VHDL
XAPP134 SDRAM VHDL design file
- 2011-01-19 09:57:21下载
- 积分:1
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ModelsimPDFWordPPT
个人搜集的各类Modelsim教程全集视频PDFWordPPT等.rar(Personal collection of all kinds of Modelsim tutorial video PDFWordPPT Complete Works, etc.. Rar)
- 2009-09-20 11:37:19下载
- 积分:1
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dds
说明: 基于fpga的函数发生器设计通过fpga实现正弦波输出(基于fpga的函数发生器)
- 2009-08-01 08:47:29下载
- 积分:1
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project1source
sdh帧同步,实现sdh帧搜索,预同步,同步,保护等各态的功能(SDH frame synchronization SDH frame search, pre-sync, synchronization, protection, the function of each state)
- 2012-11-08 11:05:55下载
- 积分:1