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VerilogHDL
本书简要介绍了Verilog硬件描述语言的基础知识,包括语言的基本内容和基本结构 ,以及利用该语言在各种层次上对数字系统的建模方法。书中列举了大量实例,帮助读者掌握语言本身和建模方法,对实际数字系统设计也很有帮助。本书是Verilog HDL的初级读本,适用于作为计算机、电子、电气及自控等专业相关课程的教材,也可供有关的科研人员作为参考书。(This book briefly introduces the Verilog hardware description language basics, including basic elements of language and basic structure, and the use of the language at various levels on the digital system modeling. The book lists a large number of examples to help readers master the language itself and the modeling of the actual digital system design is also helpful. Verilog HDL book is a primer for a computer, electronic, electrical and automatic control and other specialized courses related to materials, but also for the researchers as a reference.)
- 2010-05-11 19:54:29下载
- 积分:1
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SRAM
SRAM读写测试实例,每秒钟进行一次单字节的SRAM
读和写操作,用chipscope查看时序波形。(SRAM read and write test instances, each time a single byte SRAM
Read and write operations, use chipscope to see the timing waveform.)
- 2017-09-06 11:43:06下载
- 积分:1
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不动点在Verilog的真正功能
此功能需要写在你的模块结束或在您的测试台,显示你的定点实数。
- 2022-01-30 18:42:57下载
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基于FPGA的串口通信程序设计
本代码是一个基于FPGA的串口通信程序设计,程序采用Verilog语言编写,工程中已经加入了仿真模型,并设置了仿真,如果你的电脑也安装了modelsim-altera,就可以直接点击RTL仿真,就能出仿真结果了。程序的主要功能实串口测试,当FPGA芯片收到上位机发送的数据时将数据再发回到上位机,在串口助手上进行显示。
- 2022-03-22 10:58:18下载
- 积分:1
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ass1_3_safe
The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last
- 2011-03-05 01:17:22下载
- 积分:1
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mul24x24
24位x24位的乘法器
十分详细24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器24位x24位的乘法器(24-bit x24-bit multiplier very detailed 24-bit x24-bit 24-bit x24-bit multiplier of the multiplier 24-bit x24-bit 24-bit x24-bit multiplier of the multiplier 24-bit x24-bit 24-bit x24-bit multiplier of the multiplication Explorer 24-bit x24 multiplier 24-bit x24-bit multiplier)
- 2009-06-08 10:00:58下载
- 积分:1
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verilog-code-style-specification
企业用verilog代码风格规范 本规范规定了IC设计项目开发过程中VerilogHDL源代码的编写总则、要求及模板文件。(Enterprises with verilog code style guide for the preparation of this specification General IC design project development process VerilogHDL source code, requirements and template files.)
- 2015-05-31 16:06:37下载
- 积分:1
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在DE2lcd上实现字符显示
运用verilog语言在DE2上实现LCD的字符显示
- 2023-06-21 18:25:04下载
- 积分:1
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jtag
verilog jtag源码及原理,还有debug模块。边界扫描等(verilog jtag source and principle, as well as debug module. Boundary-Scan, etc.)
- 2021-04-27 14:18:44下载
- 积分:1
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rtl_wangjiangxing
ecc椭圆算法RTL,verilog源代码经过验证,用于FPGA或者ASIC(ECC elliptic curve encryption algorithm for Verilog implementation)
- 2015-01-29 18:43:47下载
- 积分:1