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SRAM6bit
sram 6bit仿真模型，verilog编写(sram 6bit simulation model, verilog prepared)
- 2021-03-16 13:59:22下载
- 积分：1
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vhdl代码
用vhdl语言编写的16bit的REG代码，以及iv，not and2，rca，fa，alu，acc，lfsr，mux21.
- 2023-02-03 06:35:04下载
- 积分：1
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Labview-Data-acquisition-card-
基于labview的数据采集系统，包括示波器和函数信号发生器，可以实现简单数据采集.(Labview-based data acquisition system, including oscilloscopes and function signal generator, can achieve a simple data acquisition.)
- 2014-01-15 21:26:04下载
- 积分：1
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High Speed dd
说明： (Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig
- 2020-06-24 08:40:01下载
- 积分：1
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THS1206
FPGA来实现数据采集，AD采用TI公司的THS1206，高速并行AD，内含16字FIFO，降低硬件复杂度。(FPGA to realize data acquisition, AD using TI company s THS1206, high-speed parallel AD, containing the 16-character FIFO, to reduce hardware complexity.)
- 2009-07-09 09:08:27下载
- 积分：1
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wrpc-v2.0_src.tar
About 1588 PTP protocol xillinx FPGA running code and Software application, and to introduce documents, want to help everyone
- 2021-04-14 16:38:55下载
- 积分：1
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dazhuankuai
基于FPGA设计的经典打砖块小游戏。游戏简单易玩。(FPGA design based on the classic Arkanoid game. Game easy to play.)
- 2013-11-26 09:40:37下载
- 积分：1
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mybch1
说明： 实现（7,4）BCH码的编码和译码。已知生成矩阵和校验矩阵，通过c=m*G进行编码，译码时利用伴随式译码。s=c*H‘，求得伴随式，对应的错误图样找到错误位置，对错误位置进行更正，得到译码结果。(Coding and decoding of (7,4) BCH Codes)
- 2021-04-27 17:28:44下载
- 积分：1
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CJ2
关键词：清华大学计算机系 计算机组成原理大实验 多周期cpu工程源码，内含中断，串口，以及31个指令的实现，读写内存，控制器，ALU，寄存器，分频等模块，小作业什么的可以直接从里面摘抄，为学弟学妹造福(Keywords: Department of Computer Science Computer Composition Principle experimental multi-cycle the cpu Engineering source for the benefit of mentees)
- 2020-12-29 10:09:01下载
- 积分：1
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an example HDL
an example HDL-Core with any basic gates.
- 2022-12-05 05:05:03下载
- 积分：1
