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adda
说明： 基于FPGA 黑金ALINX 515的 ADDA采样模块源码（需调试）(ADDA Sampling Module Source Code Based on FPGA Heijin ALINX 515)
- 2020-06-20 13:00:01下载
- 积分：1
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pingball
说明： 这是一个带声音的弹球小游戏，通过VGA口显示，通过扩展口JA的 pin4和 pin GND输出声音， BTN3 BTN2 控制挡板左右移动，弹球和挡板都自带动画效果(This is a band sound pinball game, through the VGA port shows that through the expansion of the mouth of the JA and pin4 output pin GND voice, BTN3 BTN2 control baffle around Mobile, pinball and baffle all bring their own animation effects)
- 2008-11-09 00:34:49下载
- 积分：1
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vendingmachine
vendingmachine vhdl code
- 2011-12-03 20:53:39下载
- 积分：1
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spi_hello
SPI接口测试程序，Xilinx参考设计，ML507硬件测试通过.(SPI interface test code，Xilinx reference design，tested on ML507 platform.)
- 2013-09-01 09:37:04下载
- 积分：1
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Rabaey---Digital-Integrated-Circuits-2e-(Prentice
imp book for cmos technology
- 2015-04-10 15:39:16下载
- 积分：1
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shuzishizhong
这是基于verilog hdl的数字时钟源代码，能够实现时分秒的计时，可以手动进行调时与调分。(This is based on the digital clock verilog hdl source code, can be achieved when every minute of the time, you can adjust the time manually adjusting points.)
- 2013-12-10 22:21:55下载
- 积分：1
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Realize with a clock input, can realize multi
实现同一个时钟输入,可以实现多分频,在一个时钟的驱动下-Realize with a clock input, can realize multi-frequency, in a clock-driven
- 2023-02-21 01:50:03下载
- 积分：1
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rscode
RS编码器在fpga上的实现，用的modelsim开发环境(RS encoder in the realization of the fpga, development environment used in modelsim)
- 2009-06-11 21:45:49下载
- 积分：1
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Adders, Subtractors, and Multipliers - DE2-115
本练习的目的是检查加法、减法和乘法运算电路。每个
- 2022-03-16 00:57:48下载
- 积分：1
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eDP
eDP接口TFT-LCD显示驱动原码（verilog+c）(eDP Interface TFT-LCD display driver source code (verilog+c))
- 2020-10-17 09:17:27下载
- 积分：1
