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VHDL
vhdl 让你更加熟悉掌握这么硬件电路设计语言 非常清晰(vhdl)
- 2010-07-22 07:30:20下载
- 积分：1
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chuzuche
出租车vhdl程序，并带有testbench仿真程序，通过开始按键复位，然后根据行使信号进行公里计数，起步价3公里8元钱，超过3公里一公里1元钱(Taxi vhdl program, with a testbench simulation program, started by the reset button, then the exercise kilometer count signal, starting at 3 km 8 yuan, more than three kilometers one kilometer dollar.)
- 2016-07-14 14:41:24下载
- 积分：1
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IRIG_DC_Decoder
IRIG_B解码器，直接解码IRIG_B DC(IRIG_B decoder)
- 2021-04-09 16:58:59下载
- 积分：1
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This is achieved using VHDL positive and negative pulse width modulator, the sam...
这个是用VHDL实现的正负脉宽调制器，同样是对新手有帮助，高手不必看了。-This is achieved using VHDL positive and negative pulse width modulator, the same is to help novice, you do not have to read. Ha ha
- 2022-06-19 04:51:41下载
- 积分：1
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1．初始状态为4个方向的红灯全亮，时间1秒。
2．东、西方向绿灯亮，南、北方向红灯亮。东、西方向通车，时间30秒。
3．东、西方向黄灯闪烁，南、北方...
1．初始状态为4个方向的红灯全亮，时间1秒。
2．东、西方向绿灯亮，南、北方向红灯亮。东、西方向通车，时间30秒。
3．东、西方向黄灯闪烁，南、北方向红灯亮。时间2秒。
4．东、西方向红灯亮，南、北方向绿灯亮。南、北方向通车，时间15秒。
5．东、西方向红灯亮，南、北方向黄灯闪烁。时间2秒。
6．返回2，继续运行。
-1. Initial state for four whole direction of the red lights lit up, a second time. 2. East and West to the green, in the south, north to the red light. West and the East to open in time for 30 seconds. 3. East and West to the blinking yellow light, in the south, north to the red light. Time 2 seconds. 4. East and West to the red light, in the south, north to the green. South and North to the opening time of 15 seconds. 5. East and West to the red light, in the south, north to the flashing yellow light. Time 2 seconds. 6. Return 2, continued to operate.
- 2023-01-12 03:20:04下载
- 积分：1
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pylori
A VANET research program
- 2012-08-23 21:50:13下载
- 积分：1
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Can realize the time digital clock display, and on the hours, minutes, seconds t...
能实现数字钟中时间的显示，并可对小时，分钟，秒进行调整-Can realize the time digital clock display, and on the hours, minutes, seconds to adjust
- 2022-04-29 18:33:18下载
- 积分：1
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pluse
说明： 发送两个频段的脉冲 个数和频率均可调
发送两个频段的脉冲 个数和频率均可调(pluse and adjust the width of pluse pluse and adjust the width of pluse )
- 2010-04-14 11:00:03下载
- 积分：1
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AD9226
一个AD9226芯片的驱动，用FPGA写的。虽然简单，但是希望对各位有帮助(An AD9226 chip driver, FPGA written. Though simple, but I hope you will help)
- 2013-09-05 01:47:36下载
- 积分：1
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Verilog prepared using USB download cable program realize USB protocol and JTAG...
用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine
- 2022-01-26 07:07:00下载
- 积分：1
