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liushuideng
使用430的四系点亮流水灯，内置有时钟函数，函数简单，值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)
- 2013-08-31 15:23:06下载
- 积分：1
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Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...
Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
- 2022-02-02 23:02:14下载
- 积分：1
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fpga
pid算法控制电机运动，实现fpga与dsp的双口RAM通信(PID algorithm to control motor movement, the realization of FPGA and DSP dual port RAM communication)
- 2020-12-08 20:39:20下载
- 积分：1
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a simple survey of 110 three detectors, and a logical map vhdl description, incl...
一个简单的探测110三位的探测器，用逻辑图和vhdl描述，包括实验报告和测试图。-a simple survey of 110 three detectors, and a logical map vhdl description, including reports and experimental test plan.
- 2023-02-09 13:20:04下载
- 积分：1
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pinlvji
使用FPGA测量频率大小，并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)
- 2020-06-18 10:20:02下载
- 积分：1
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数字频率计数字频率计
数字频率计
数字频率计-Digital frequency meter digital frequency meter
- 2022-01-24 16:05:05下载
- 积分：1
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WigglerJTAG
Wiggler Clone .JTAG Schematic and PCB in Altium Designer Format
- 2009-07-17 19:27:27下载
- 积分：1
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全数字fsk调制解调的实现 verilog源码
全数字fsk调制解调的实现 verilog源码-All-digital realization of fsk modem verilog source code
- 2023-04-11 15:55:04下载
- 积分：1
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FPGA_实时时钟设计
通过配置DS1302芯片来实现实时时钟的监测，我们通过通过控制2个按键来选择我们要在数码管上显示的时间，按下按键1我们来显示周几，按下按键2来显示年月日，不按显示时分秒，这样显示复合我们的数字表的显示(By configuring DS1302 chip to monitor the real-time clock, we select the time that we want to display on the digital tube by controlling 2 keys. Press key 1 to show the week, press the key 2 to show the year and month, not according to the display time, so that the display of the display of the display of our digital table.)
- 2020-10-22 15:17:23下载
- 积分：1
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用VHDL语言设计四位全加器，有低位进位和高位进位。
用VHDL语言设计四位全加器，有低位进位和高位进位。-VHDL language with four full-adder design, there are low and the high binary binary.
- 2022-03-20 15:03:38下载
- 积分：1
