-
NIOSII I2C接口模块及驱动程序,并含有测试程序。对想开发NIOS的工程师很有帮助...
NIOSII I2C接口模块及驱动程序,并含有测试程序。对想开发NIOS的工程师很有帮助-NIOSII I2C interface module and driver, and contains the test procedures. NIOS of engineers want to develop useful
- 2022-10-02 15:40:03下载
- 积分:1
-
C-V2X-master
说明: LTE is an abbreviation for Long Term Evolution.
- 2019-06-29 01:08:09下载
- 积分:1
-
rs-codec(255-223)
RS编码是一种纠错码,本程序实现RS(255,223)用FPGA 实现RS编码,程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)
- 2021-05-13 00:30:02下载
- 积分:1
-
fpga_12864
这是基于Nios II的12864液晶点亮程序,包含汉字、字符等(This is a program which is based on Nios II ,its function is light the 12864 LCD that including Chinese characters, characters)
- 2012-07-02 17:28:21下载
- 积分:1
-
这是一本关于VHDL编程的书籍,网上突然发现的,相信对相关人员会有所用途....
这是一本关于VHDL编程的书籍,网上突然发现的,相信对相关人员会有所用途.-This is a book on VHDL programming, on-line suddenly found, I believe that the relevant staff will be use.
- 2023-02-06 08:50:07下载
- 积分:1
-
本书详细介绍了VHDL硬件描述语言,希望在以后的工作中能用到...
本书详细介绍了VHDL硬件描述语言,希望在以后的工作中能用到-This book details the VHDL hardware description language, want to work in the future can be used to
- 2022-05-25 00:38:07下载
- 积分:1
-
这个程序是基于等精度测频原理的频率计,用VHDL语言实现,频率测量测量范围1~9999;用4位带小数点数码管显示其频率,并且具有超量程、欠量程提示功能。...
这个程序是基于等精度测频原理的频率计,用VHDL语言实现,频率测量测量范围1~9999;用4位带小数点数码管显示其频率,并且具有超量程、欠量程提示功能。-This procedure is based on the principle of frequency measurement accuracy, such as the frequency meter, using VHDL language, frequency measurement range 1 ~ 9999 with four decimal places with the frequency of the digital display and has a super-range, less range prompts.
- 2022-03-04 13:27:35下载
- 积分:1
-
AMBA-Bus_Verilog_Model
说明: 该源码包是2.0版本的AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型,AHB总线上从设备RAM模型,参数定义。(This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave,Defines.)
- 2021-04-25 21:48:46下载
- 积分:1
-
1路视频光端机的接收端,VHDL源码,使用全FPGA芯片的硬件,内建解帧、时钟、DESERDES...
1路视频光端机的接收端,VHDL源码,使用全FPGA芯片的硬件,内建解帧、时钟、DESERDES-PDH a video of the receiving end, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
- 2022-04-30 11:01:06下载
- 积分:1
-
本人初学VHDL时编的比较系统的VHDL源程序 巨实用
本人初学VHDL时编的比较系统的VHDL源程序 巨实用 -I am learning more systematic series of practical VHDL source Giant
- 2022-01-26 04:42:18下载
- 积分:1