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Ffpga-jpegP
基于FPGA的JPEG图像压压缩，实现JPEG图像的实时压缩
(Real-time compression pressure compressed FPGA-based JPEG images, JPEG images)
- 2012-08-23 22:11:39下载
- 积分：1
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vhdl语言和verilog语言转换工具
能很容易的实现两种语言的相互转换...
vhdl语言和verilog语言转换工具
能很容易的实现两种语言的相互转换-verilog language vhdl language and conversion tools can easily achieve the conversion between two languages
- 2022-08-16 14:34:56下载
- 积分：1
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fir-filter
11阶fir数字滤波器的verilog程序设计，线性相位，系数量化处理(11 order of fir digital filter verilog programming, linear phase, the coefficient quantization)
- 2012-03-05 10:33:03下载
- 积分：1
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Exercise4
说明： AES TSAPI Retrieve Event in Non-blocking Mode
- 2019-05-07 20:04:58下载
- 积分：1
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ov7670_sdram_vga_sobel
基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。
FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board.
FPGA edge detection)
- 2019-04-23 17:31:00下载
- 积分：1
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Dice_game
VHDL Project for beginners. Electronic dice game. Perfect for Spartan devices.
- 2011-02-22 22:07:59下载
- 积分：1
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clk_div3
基于XIlinx ISE，用Verilog语言实现3分频电路，适合初学者(Based XIlinx ISE, Verilog language using the frequency dividing circuit 3, suitable for beginners)
- 2017-04-03 23:29:15下载
- 积分：1
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oled
驱动0.96寸的oled显示数字和字母，(Drive 0.96 inch OLED to display numbers and letters.)
- 2021-01-14 16:28:46下载
- 积分：1
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OFDMSystemDesignandSimulation
OFDM通信系统设计与仿真(shuoshilunwen)(OFDM System Design and Simulation
)
- 2014-08-18 15:09:35下载
- 积分：1
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Uses Verilog the HDL design, development board realizes in
Altera on the EP1S10S...
采用Verilog HDL设计，在Altera EP1S10S780C6开发板上实现
选取6MHz为基准频率，演奏的是梁祝乐曲
- Uses Verilog the HDL design, development board realizes in
Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the
performance is Liang wishes the music
- 2022-04-11 11:29:11下载
- 积分：1
