-
VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。...
VHDL描述的简易图像缩小模块，将PAL制720×576的图片缩小为512×410，采用最近临域法，13.5MHz时钟下可实时处理PAL视频。-VHDL description of a simple image to narrow the module, will be PAL system of 720 × 576 image reduced to 512 × 410, using the recent Pro-domain method, 13.5MHz clock can handle PAL video in real time.
- 2022-06-11 23:09:14下载
- 积分：1
-
v3
说明： mojo v3 complete eagle schematic
- 2018-02-08 22:47:52下载
- 积分：1
-
UART
verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用(verilog code for serial port transmit and receive code, with source code and test files, and accurate available)
- 2011-10-19 09:20:12下载
- 积分：1
-
24_Timer
使用Verilog编写的24位定时器，具有apb 总线接口，可以设置工作方式和计数初值。(The 24-bit timer written by Verilog has APB bus interface, which can set working mode and count initial value.)
- 2021-04-27 21:38:44下载
- 积分：1
-
VESA Timing
VESA CVT视频参数计算器，输入分辨率和刷新率即可得到需要参数。(VGA Timing Calculator)
- 2020-12-23 14:29:07下载
- 积分：1
-
I2C
说明： iic总线挂接在amba的apb总线上，标准接口，verilog代码的实现(iic bus attached to the amba' s apb bus, standard interfaces, verilog code implementation)
- 2011-04-02 10:04:36下载
- 积分：1
-
Low
低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code
- 2022-11-29 01:15:03下载
- 积分：1
-
shengyinchuli
通过matlab对于声音进行处理，实现FFT，均值，方差，中值滤波，自相关分析，白噪声等处理(Matlab sound processing, FFT, mean, variance, median filtering, autocorrelation analysis, white noise and processing)
- 2021-03-01 22:29:34下载
- 积分：1
-
CORDIC_ATAN
FPGA实现反正切功能，工程原件，包括测试文件，能够很好实现该功能(FPGA implements arctangent function, original engineering)
- 2018-11-06 15:25:26下载
- 积分：1
-
prac2
VHDL implementation using mouse and monitor
- 2009-06-28 20:10:56下载
- 积分：1
