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VHDL语言程序集。PDF格式,所有的例子,你将看不到偷…
vhdl语言例程集锦.pdf,全部的例子,看你会不会偷了-VHDL language routines Collection. pdf, all the examples, you will not see stealing
- 2022-02-11 21:16:40下载
- 积分:1
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USB_devide
利用最新的嵌入式开发工具EDK,在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程,从而在FPGA
中实现U S B 控制器, 并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。(Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.)
- 2007-10-04 16:27:44下载
- 积分:1
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verilog实现的“BCD/七段译码器”。
verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
- 2022-12-23 05:15:02下载
- 积分:1
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xilinx 器件vhdl原程序,LCD控制
xilinx 器件vhdl原程序,LCD控制-Xilinx devices VHDL original procedure, LCD control
- 2023-03-04 21:15:04下载
- 积分:1
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FPGA-timing-constraints
基于Verilog的FPGA设计时序分析约束详细解释与使用方法(FPGA timing constraints)
- 2017-04-24 09:54:35下载
- 积分:1
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tb_time_offfset
说明: offset_cancellation code for matlab to hdl
- 2020-06-17 12:20:02下载
- 积分:1
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delay
PWM整流器的死区延迟的VHDL编程,可以参考一下(VHDL programming PWM Rectifier dead-band delays)
- 2016-04-12 14:24:45下载
- 积分:1
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xilinx CTC IPcore(encoder 和 decoder)的标准测试,未经信道加噪
xilinx CTC IPcore(encoder 和 decoder)的标准测试,未经信道加噪-the standard test of xilinx CTC IPcore (encoder and decoder) , without the channel with noise
- 2022-04-25 17:11:32下载
- 积分:1
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Modelsim_SDRAM
本实例用于SDRAM完成读写功能:
先向SDRAM里面写数据,然后再将数据读出来做比较,如果不匹配就通过LED变亮显示出来,如果一致,LED就不亮。(The examples for SDRAM read and write functions.)
- 2013-02-06 10:38:14下载
- 积分:1
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用FPGA 是先键盘的程序,is good for you
用FPGA 是先键盘的程序,is good for you -FPGA is the first keyboard to use the procedure, is good for you
- 2023-08-22 22:30:03下载
- 积分:1