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QMD
说明： 实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)
- 2019-05-05 15:37:58下载
- 积分：1
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coverlater
本程序是在Quartus7.2环境下编译的一个简单的(2,1,3)卷积码，能够成功地编译和仿真。(This procedure is in circumstances Quartus7.2 compile a simple (2,1,3) convolutional code, can successfully compile and simulation.)
- 2021-03-13 20:49:24下载
- 积分：1
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UMC_90nm_1P9M_LOGIC_MIXED_MODE_Process_TLR_V1.1
UMC 90nm design kit. please read before using thee models.
- 2013-02-02 11:24:38下载
- 积分：1
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verilog
用Verilog语言编写的产生正弦波和方波的程序(Generate sine and square wave Verilog language program)
- 2021-04-25 20:48:46下载
- 积分：1
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FPGA_Seg7_dsp
关于VHDL和verilog的数码管显示程序，写的很好，值得参考。(About VHDL and verilog digital tube display program, write well, worth considering.)
- 2014-08-01 11:00:51下载
- 积分：1
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基于FPGA的多路同步脉冲发生器设计1
说明： 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
- 2020-03-18 20:52:05下载
- 积分：1
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fifo
异步FIFO
输入: 16bit
输出:16bit
深度:256(Asynchronous FIFO
Input: 16bit
Output: 16bit
Depth: 256)
- 2017-07-10 14:02:36下载
- 积分：1
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本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。...
本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。-This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.
- 2022-07-20 09:46:32下载
- 积分：1
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problem
在学习verilog 中与遇到一些列问题的整理。(this Documentation is about the problem about verilog which is meeted when i was learn FPGA)
- 2014-03-07 22:24:19下载
- 积分：1
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用Bresenham算法在FPGA上实现小数分频器，verilog编写，计算机图形法...
用Bresenham算法在FPGA上实现小数分频器，verilog编写，计算机图形法-Bresenham algorithm used in the FPGA to achieve a small number of crossovers, verilog preparation, computer graphics method
- 2022-03-11 03:26:38下载
- 积分：1
