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80211_Transmitter_VerilogHDL
802.11a Transmitter implementation Using Verilog
- 2021-01-20 15:28:41下载
- 积分：1
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CACPU
basic cpu design in verilog
- 2016-01-11 23:26:01下载
- 积分：1
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Electronic organ program design implementation and simulation of vhdl source cod...
电子琴程序设计与仿真的vhdl实现的源代码-Electronic organ program design implementation and simulation of vhdl source code
- 2022-02-02 22:03:59下载
- 积分：1
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VHDL_programs
VHDL programmes for basic digital circuits. begineers can learn easily
- 2013-09-28 13:46:58下载
- 积分：1
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bubblesort1024ram
说明： 快速冒泡排序基于FPGA实现，有测试文件以及设计图，实现1024*32位数序的多数排序，突破传统是的REG类型少数排序，利用RAM，针对RAM中的无序数的地址调换，达到排序目的，仅供学习交流(Rapid bubble sort based on FPGA, there are test documents and design drawings to achieve 1024* 32-digit sequence of the majority of sorting, breaking tradition is a REG types of minority sorting, the use of RAM, the disorder for the RAM address of the number of exchange, to sort purpose, only to learn the exchange of.)
- 2010-03-24 15:19:50下载
- 积分：1
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VHDL开发环境，出租车计费系统，实现起步10元，每增加一公里，自动上涨2元。...
VHDL开发环境，出租车计费系统，实现起步10元，每增加一公里，自动上涨2元。-VHDL development environment, taxi billing system to achieve the initial 10 yuan for each additional mile, automatic up 2.
- 2022-03-26 01:55:17下载
- 积分：1
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429NEW-03-15
429总线通过FPGA直接实现发送程序,通过Verilog实现(send 429 message by Verilog and FPGA )
- 2021-04-23 09:58:48下载
- 积分：1
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divider
verilog HDL编写的浮点除法器，编译通过，可综合。压缩包包含三个文件。(verilog HDL write floating-point divider, compile, can be integrated. Archive contains three files.)
- 2011-08-29 09:12:21下载
- 积分：1
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SDRAM基础性控制核 很有用的 VHDL状态机实现
SDRAM基础性控制核 很有用的 VHDL状态机实现-SDRAM control of the nuclear basic useful VHDL state machine implementation
- 2022-07-10 17:18:23下载
- 积分：1
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xapp1026
XILINX中LWIP协议例子应用指南，有实际例子(Examples of applications in LWIP agreement XILINX Guide, a practical example)
- 2020-10-13 22:07:32下载
- 积分：1
