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32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考...
32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
- 2023-09-04 17:30:04下载
- 积分：1
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Xilinx_2018_Licenses_Downloadly.ir
Xilinx Licenses 2018
- 2020-06-25 08:20:01下载
- 积分：1
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i2s_input
基于FPGA的i2s接口输入模块设计，其中有原理图和verilog源码，可在Quartus环境下进行仿真(FPGA-based i2s interface input module design, including schematics and verilog source code, can be simulated in Quartus environment)
- 2020-12-14 16:49:14下载
- 积分：1
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FPGA-SRAM_Test
利用FPGA实现SDRAM的读写操作，通过硬件测试。(FPGA implementation using SDRAM to read and write operation, hardware testing.)
- 2011-08-03 22:52:25下载
- 积分：1
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Key-200893142940130
说明： 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典(Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure)
- 2008-10-07 18:16:54下载
- 积分：1
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内嵌BRAM设计LIFO堆栈
具有先进后出的堆栈功能。此LIFO堆栈具有两个按键（write， read），按下write键后，开始输入数据data0-data3；按下read键后，7段数码管开始倒序显示data3-data0（十进制）。
高级要求（可选）： 按下write键，VGA显示“Write”字样，并同时显示输入数据；按下read键，VGA显示“Read”字样，并同时显示输出数据。
- 2022-04-29 13:49:12下载
- 积分：1
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1
verilog 典型电路设计包含各种常用电路的源码和详细的解释，适合新手使用(Verilog typical circuit design includes a variety of commonly used circuit source code and detailed explanations, suitable for beginners to use
)
- 2014-03-19 10:48:41下载
- 积分：1
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Decimal precision counts, classic written, easy learning and reference for all t...
十进制精确计数，经典写法，便于学习与参考，供大家分享-Decimal precision counts, classic written, easy learning and reference for all to share
- 2022-03-24 02:37:10下载
- 积分：1
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GPS
在fpga中对GPS信息采集程序。具有很好的参考性(In the fpga in the GPS information collection procedures. Has a very good reference)
- 2011-11-17 13:49:20下载
- 积分：1
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mimo_dectection
mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过
(mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on)
- 2021-02-15 12:09:48下载
- 积分：1
