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吠陀2x2
模块vedic_2_x_2（A，B，C ；）；
- 2022-05-14 14:46:13下载
- 积分：1
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FPGA1(introduce)
FPGA三国论战，入门介绍和高端见解！对于FPGA初学者很有用。(Three FPGA controversy, and high-end introduction to ideas! For FPGA useful for beginners.)
- 2014-03-22 16:19:51下载
- 积分：1
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practica1
binary comparator with register
- 2012-04-24 17:39:04下载
- 积分：1
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利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信 BLUE
利用EGO1数模混合口袋实验平台上的蓝牙模块与板卡进行无线通信。使用支持蓝牙 4.0 的手机与板卡上的蓝牙模块建立连接，并且通过手机 APP 发送命令，控制 FPGA 板卡上的硬件外设。(The Bluetooth module on the EGO1 digital-analog mixed pocket experimental platform is used to communicate with the board. The Bluetooth 4.0-enabled mobile phone is used to establish a connection with the Bluetooth module on the board, and commands are sent through the mobile phone APP to control the hardware peripherals on the FPGA board.)
- 2020-06-24 02:00:02下载
- 积分：1
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光纤陀螺仪信号调制解调Verilog源码
内容为干涉式光纤陀螺仪信号调制解调Verilog源码，包含整个基于altera FPGA的工程文件。
- 2022-01-25 15:14:49下载
- 积分：1
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my_or
verilog 或门程序 初学者必备。。。。。。。。。。。。(verilog )
- 2009-05-26 16:07:42下载
- 积分：1
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sd模型
说明： 完整的Verilog验证模型，包括设备完整的状态。(Complete verilog Verification Model)
- 2020-06-16 09:00:01下载
- 积分：1
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VHDL_example_100
本书通过100个实例，详细介绍便件描述语言vHDL的各种语法现象及其在专用集成电路(AHc)设计蝴还中的使用方法。(the book through one hundred examples, it detailed description language vHDL pieces of the phenomenon and its various grammatical in ASIC (AHc) were also designed butterfly The usage.)
- 2007-03-25 09:57:05下载
- 积分：1
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i2c
说明： I2C完整代码，可综合，可仿真，已经过验证(I2C code can been syn and simulation ,veritify)
- 2021-02-26 13:11:46下载
- 积分：1
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DDS_Power
FPGA上的VERILOG语言编程。通过查找表实现直接数字频率合成。在主控部分通过键盘选择正弦波，方波，三角波，斜波，以及四种波形的任意两种的叠加，以及四种波形的叠加；通过控制频率控制字C的大小，以控制输出波形频率，实现1Hz的微调；通过地址变换实现波形相位256级可调；通过DAC0832使波形幅值256级可调；通过FPGA内部RAM实现波形存储回放；并实现了每秒100HZ扫频。(FPGA on the verilog language programming. Lookup table through direct digital frequency synthesis. In part through the control of the keyboard to choose sine, square, triangle wave, sloping wave, and four arbitrary waveform two superposed and the stack of four waveform; by controlling the frequency control word on the size, in order to control the output waveform frequency, 1 Hz to achieve the fine-tuning; Address transform through waveform phase adjustable 256; DAC0832 so through waveform amplitude adjustable 256; FPGA through internal RAM to the waveform storage intervals; and achieve a 100 per second sweep 9999.)
- 2007-04-17 23:43:32下载
- 积分：1
