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m_xulie
在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)
- 2013-09-26 11:30:47下载
- 积分：1
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3FP
一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分：1
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ad73311
AD73311芯片的控制和数据程序，用于控制音频AD芯片。(AD73311 chip control and data program)
- 2021-02-01 23:20:00下载
- 积分：1
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Can realize the time digital clock display, and on the hours, minutes, seconds t...
能实现数字钟中时间的显示，并可对小时，分钟，秒进行调整-Can realize the time digital clock display, and on the hours, minutes, seconds to adjust
- 2022-04-29 18:33:18下载
- 积分：1
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FCFS_PROJECT_A
FCFS (First Come First Served) with Database
- 2014-10-09 20:23:32下载
- 积分：1
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基于VHDL的I2C程序0004,很不错的论文及程序，，大家快下啊
基于VHDL的I2C程序0004,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0004, a very good paper and procedures, we quickly under ah
- 2022-02-13 02:05:07下载
- 积分：1
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Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)
- 2018-12-07 15:33:22下载
- 积分：1
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FIR_poroje
this project is about FIR FIlter By VHdl codes in the ISE.
- 2013-09-29 19:25:16下载
- 积分：1
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AVR IP CORE
可以直接用于工程的开发和
已经通过编译和仿真
AVR IP CORE
可以直接用于工程的开发和
已经通过编译和仿真-AVR IP CORE can be directly used for project development and has passed the compiler and simulation
- 2022-02-15 18:01:54下载
- 积分：1
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pwm
实现pwm波的输出，按键可调占空比的，可通过连接pwm输出值led灯以检测占空比的变化(To realize the output of the PWM wave, key adjustable duty ratio, but through the connection PWM output value led lamp with testing duty ratio changes
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- 2020-12-20 21:19:08下载
- 积分：1
