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9826
针对AD9826驱动设计的Verilog代码，主要是配置ccd采样的设计(The Verilog code is designed for AD9826, to configuration ccd sampling )
- 2020-07-16 21:48:50下载
- 积分：1
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qam_64
64QAM调制,采用硬件语言verilog实现,其中调用了DDS的IP核(64QAM modulation, using language verilog hardware implementation, which is called the IP core of the DDS)
- 2021-03-02 23:29:33下载
- 积分：1
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8251的完整的功能的实现,可以进行编译,综合.
8251的完整的功能的实现,可以进行编译,综合.-8251 complete function of the realization can be compiled and integrated.
- 2022-02-25 05:27:00下载
- 积分：1
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20190717 - Copy
说明： this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分：1
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lowpass
低通滤波器（由matlab和simulink两种方法实现）源文件及图片示例(Low-pass filter) source file and photo examples (by the two methods matlab and simulink)
- 2013-03-13 18:36:40下载
- 积分：1
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Tym605V2Demo
FPGA（赛灵思）试验箱 实验程序 有Audio,Buzzer,key,ledarray,ledseg.......(FPGA（赛灵思）试验箱 实验程序Audio,Buzzer,key,ledarray,ledseg)
- 2012-02-11 21:09:19下载
- 积分：1
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用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试...
用verilog HDL语言，通过一个4位移位寄存器实现一个信号转化为HDB3码并进行测试
-Using verilog HDL language, through a 4-bit shift register realization of a signal into HDB3 code and test
- 2023-05-23 03:15:03下载
- 积分：1
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通过实例的VHDL程序设计
VHDL programming by example
- 2022-03-19 05:46:52下载
- 积分：1
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inverter chain
说明： 基于HSPICE实现的反相器链，并分析电路延时(Inverter chain based on HSPICE, and analyze circuit delay)
- 2020-04-21 12:55:52下载
- 积分：1
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deng
HDL verilog 电子密码锁 输入错误后有报警 输入正确后有提示(HDL Verilog electronic code lock input errors have prompted alarm input is correct)
- 2012-06-27 19:25:53下载
- 积分：1
