-
SPI_Code(Verilog)
SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用(SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses)
- 2021-05-13 13:30:02下载
- 积分:1
-
ahdl--sine-wave-code-with-rom-look-up-table_imp
hi this is an verilog codes
- 2011-11-11 14:30:21下载
- 积分:1
-
CAL
基于BCD码的十进制ALU设计,可实现加减乘除的功能(BCD to decimal ALU based design can achieve the arithmetic function)
- 2013-06-30 19:49:34下载
- 积分:1
-
跑马灯led_horse vhdl cpldfpga
跑马灯led_horse vhdl cpldfpga-led_horse vhdl cpldfpga
- 2022-12-03 00:40:03下载
- 积分:1
-
data_rom
正弦信号发生器,用VHDL来完成,抗干扰能力较强,(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)
- 2009-07-15 22:44:02下载
- 积分:1
-
testbench(xilinx)
Testbench 不仅要产生激励也就是输入,还要验证响应也就是输出。当然也可以只产生
激励,然后通过波形窗口通过人工的方法去验证波形,这种方法只能适用于小规模的设计(The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce
Incentive, and then the waveform by the waveform window by artificial means to verify, this method is only applicable to small-scale design)
- 2012-04-18 16:08:25下载
- 积分:1
-
Gap_Finder
this example finds the gapes that are existed in a word
- 2010-01-29 18:41:25下载
- 积分:1
-
Voltage pulse control of a project
电压脉冲控制的一个工程---包括vhdl源程序和编译后产生的相关文件-Voltage pulse control of a project- including VHDL source code and compile the relevant documents after
- 2022-03-20 09:09:15下载
- 积分:1
-
This program is Verlog language program, using QUARTUS6.0 preparation, program i...
本程序为Verlog语言程序,采用QUARTUS6.0编写,程序实现的功能是控制AD2S80的转换和和数据总线上数据的读取-This program is Verlog language program, using QUARTUS6.0 preparation, program implementation function is to control the conversion and AD2S80 and data bus to read data
- 2022-02-10 16:51:45下载
- 积分:1
-
8051core-Verilog
8051core-Verilog FPGA
- 2021-02-02 21:59:59下载
- 积分:1