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youmui_v20
ICA (Principal Component Analysis) algorithm and procedures, GSM is GMSK modulation signal generation, On neural network control.
- 2017-09-01 20:51:26下载
- 积分:1
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Endat2_1_freq
用verilog实现endat2_1驱动,并用signalTap捕捉信号。(Using verilog achieve endat2_1 drive and use signalTap capture signal.)
- 2021-04-26 15:08:45下载
- 积分:1
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source
FPGA与SDRAM 的 VHDL 接口设计(the interface of FPGA and SDRAM)
- 2012-03-28 22:17:19下载
- 积分:1
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bingchuan
说明: 简单的vhdl的四位并串转换程序,可以实现数据的并串转换(Simple vhdl string of four and the conversion process, can convert the data and the string)
- 2011-04-02 12:16:35下载
- 积分:1
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wishbone 源代码,opencore
wishbone 源代码,opencore-wishbone source code, opencore
- 2022-05-13 00:28:04下载
- 积分:1
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wom_kg
ϵͳʱ
- 2006-03-13 15:09:50下载
- 积分:1
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ps2interface
one of example about hardware design language
- 2009-12-25 07:17:18下载
- 积分:1
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检测上升沿的verilog程序,有验证程序,可用synplify验证
检测上升沿的verilog程序,有验证程序,可用synplify验证-Detection of rising edge of the Verilog procedures, there is the verification process can be used to verify Synplify
- 2022-01-31 05:33:02下载
- 积分:1
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通过VHDL语言的例子,对FPGA的VHDL语言的原型(第六章)是
应用背景FPGA原型的VHDL例子提供一系列清晰,易于遵循的快速代码开发模板;大量的实际例子来说明和强化的概念和设计技术;现实可实施的项目和测试在Xilinx原型板;深入探索和Xilinx PicoBlaze软核微处理器。关键技术本书采用“做中学”介绍VHDL和FPGA技术的概念和设计人员通过一系列的实验方法。
- 2022-03-20 09:59:40下载
- 积分:1
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FPGA读写SDRAM的VHDL程序(已经测试过)
FPGA读写SDRAM的VHDL程序(已经测试过)-SDRAM read and write the VHDL program FPGA (already tested)
- 2022-05-20 21:52:20下载
- 积分:1