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Hardware Description Language VHDL of the frequency counter program can be used...
硬件描述语言VHDL的频率计程序,可用于做实验,或者初学者借鉴.-Hardware Description Language VHDL of the frequency counter program can be used for experiments, or the beginners learn.
- 2023-01-23 07:20:04下载
- 积分:1
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jesd204_0_ex
jesd204b接收部分程序和带仿真历程(Jesd204b receiving part program and simulation process)
- 2020-11-26 14:49:31下载
- 积分:1
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60进制减法
相比较 代码效率高
可以进行级联
60进制减法
相比较 代码效率高
可以进行级联-60 compared to 229 subtraction efficient code can be concatenated
- 2022-01-25 18:25:04下载
- 积分:1
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Idddc_30mF
中频70M,30M带宽LFM信号,采样率为102.4M,,数字下变频后,还进行了三倍抽取,最后还得到I,Q两路信号
(IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)
- 2012-07-25 23:56:30下载
- 积分:1
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mipi_phy
mipi传输,用于新型图像传感器的传输问题(MIPI transmission, new image sensors for the transmission problem)
- 2009-02-13 12:02:40下载
- 积分:1
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fht_latest.tar
FAST HADAMARD TRANSFORM VERILOG FOR IMAGE PROCESSING
- 2013-08-19 13:47:40下载
- 积分:1
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saw
verilog编写,巧妙的通过计数方式完成了三角波的波形,可直接对da输出。(verilog written, cleverly accomplished by counting the triangular waveform can be output directly to da.)
- 2015-04-16 21:06:15下载
- 积分:1
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oc8051 Verilog代码,关于
verilog code,about oc8051
- 2023-04-16 08:45:03下载
- 积分:1
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reference
早迟门(early late gate),比特同步算法,该文档详细的说明了早迟门算法的原理以及具体的实现步骤(Early late gate (early late gate), bit synchronization algorithm, the document explains in detail the principles of early-late gate method and the specific implementation steps)
- 2015-04-30 15:06:04下载
- 积分:1
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vhdl 加法器 vhdl 加法器
vhdl 加法器
vhdl 加法器 vhdl 加法器
vhdl 加法器-vhdl adder vhdl adder vhdl adder
- 2022-09-01 23:25:03下载
- 积分:1