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ddr3_model
一个verilog语言开发编写的简单的ddr3模型(A simple model ddr3, written with verilog language)
- 2020-08-26 17:38:13下载
- 积分：1
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pc104vhdl_change
PC104总线的CPLD代码，调试已经通过，可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering
示例用法:)
- 2013-08-29 12:07:43下载
- 积分：1
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UDP / IP上的Spartan3E以太网通信
UDP / IP上的Spartan3E以太网通信通过斯巴达3E发送UDP数据包到/从我的电脑。
- 2022-06-20 12:49:08下载
- 积分：1
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fft
说明： 用FPGA实现8点fft，整个代码使用verilog编写，主要运用了加法器和乘法器，简单易懂(8-point FFT with FPGA, The whole code is written by Verilog, mainly using adder and multiplier, which is easy to understand)
- 2021-03-29 20:59:10下载
- 积分：1
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Modelsim
不错的Quartus II 与modelsim结合仿真简介笔记，较为适合初学者，希望对大家有帮助！()
- 2008-06-06 18:16:53下载
- 积分：1
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edge_detect_p
用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)
- 2012-03-27 14:49:21下载
- 积分：1
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通过VGA接口获取视频输出的VHDL代码
vhdl code for obtaining video output through vga port
- 2022-02-04 13:35:30下载
- 积分：1
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第七次课--视频图像DCT处理及水印嵌入
熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。
利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。
利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。
利用双线性插值方法实现对图像640×480到1024×768的放大操作。
完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format.
Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface.
With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA.
The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768.
Complete the VGA display interface design.)
- 2020-06-25 04:00:02下载
- 积分：1
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加法器（使用verilog编写的）,虽然简单，但是这也是学习verilog最基础的东西！希望大家一起学习！...
加法器（使用verilog编写的）,虽然简单，但是这也是学习verilog最基础的东西！希望大家一起学习！-The accumulator (uses the verilog compilation), although it is simple, but this also is studies most foundation of the verilog! Hopes everybody studies together!
- 2023-07-08 05:35:13下载
- 积分：1
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TLC2543
使用Verilog实现的AD采样，很有用的！(Implemented using Verilog AD sampling, very useful!)
- 2020-11-18 15:59:39下载
- 积分：1
