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7 digital display decoder design 7 Digital is pure combinational circuits, usual...
7段数码显示译码器设计7段数码是纯组合电路，通常的小规模专用IC，如74或4000系列的器件只能作十进制BCD码译码，然而数字系统中的数据处理和运算都是二进制的，所以输出表达都是十六进制的，为了满足十六进制数的译码显示，最方便的方法就是利用译码程序在FPGA/CPLD中来实现。例子作为七段译码器，输出信号LED7S的7位分别接数码管的7个段，高位在左，低位在右。例如当LED7S输出为“1101101”时，数码管的7个段g、f、e、d、c、b、a分别接1、1、0、1、1、0、1；接有高电平的段发亮，于是数码管显示“5”。-7 digital display decoder design 7 Digital is pure combinational circuits, usually of small-scale dedicated IC, such as 74 or 4000 Series devices can only be used to decimal BCD decoder, but digital systems in the data processing and computing are binary, so the output expression are hexadecimal, and hexadecimal number in order to meet the needs of the decoding shows that the most convenient way is to use decoding process in FPGA/CPLD in to achieve. Seven-Segment decoder as an example, the output signal of the seven were LED7S access digital pipe 7 above, high in the left, low in the right. For example, when LED7S output as
- 2022-08-11 21:55:01下载
- 积分：1
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altfp_matrix_mult
浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)
- 2013-12-18 15:08:36下载
- 积分：1
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bandpass
FIR有限冲击响应下带通滤波器的构建及滤波器仿真（通过matlab和simulink两种方法实现）(FIR finite impulse response bandpass filter and filter simulation (via two methods matlab and simulink))
- 2013-03-13 18:32:07下载
- 积分：1
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cppOrbitTools
tle转换为六根数的c++源代码，英文原版代码，测试可用(tle converted to six the number of c++ source code, the English original code, test available)
- 2021-03-16 10:49:21下载
- 积分：1
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beep 123456
实现beep发出1234567的音乐声音-beep 123456
- 2022-03-21 11:58:28下载
- 积分：1
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SignalTapII学习笔记
说明： 学习fpga的工具signaltap软件使用说明书，好工具(Learn the instruction manual of signaltap software, a good tool)
- 2020-03-29 17:59:18下载
- 积分：1
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基于FPGA的快速傅立叶变换实现，适合fpga工程技术人员参考设计...
基于FPGA的快速傅立叶变换实现，适合fpga工程技术人员参考设计-FPGA-based Fast Fourier Transform for fpga reference design engineers
- 2022-12-10 15:50:11下载
- 积分：1
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20081209_Test_maus
Its project to move your mouse cursor on a vga monitor. it is very funny -)(Its project to move your mouse cursor on a vga monitor. it is very funny -))
- 2009-05-12 18:53:12下载
- 积分：1
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MifFileGen
VC++6.0软件生成Altera公司FPGA内部存储器ROM初始化数据mif格式文件。方便通过QuartusII导入波形等参数。强调这个是例子，生成的是一个定点的正弦数据表文件，需要用到的请自行修改源代码。(This software generates internal memory ROM initialization mif format data file for FPGA product by Altera. Facilitate the passage of the waveform parameters such as import QuartusII)
- 2013-07-19 02:32:45下载
- 积分：1
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本例为TLC7524接口电路VHDL原程序
本例为TLC7524接口电路VHDL原程序-Example for the TLC7524 interface circuit VHDL original procedure
- 2022-03-01 05:38:08下载
- 积分：1
