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这个程序执行的复用与解复用
this program performs multiplexing and demultiplexing
- 2022-10-04 09:30:03下载
- 积分:1
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spi_master_sent
在FPGA平台实现SPI传输协议开发,SPI为三总线式。(Implementation of SPI transmission protocol development on FPGA platform)
- 2020-08-02 08:18:35下载
- 积分:1
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Verilog代码。注册成功,对FPGA的使用标准单元库…
verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
- 2022-06-15 14:54:08下载
- 积分:1
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增强的音频工程
Enhanced Audio Project
by
Dixie Xue & Wei Zhang
-Enhanced Audio Project
by
Dixie Xue & Wei Zhang
- 2022-08-26 07:09:41下载
- 积分:1
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华为经典FPGA设计全套入门技巧
说明: 华为经典设计全套入门技巧,面试经验,设计技巧(Huawei Classic Design Complete Introduction Skills, Interview Experience, Design Skills)
- 2020-07-01 23:00:02下载
- 积分:1
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sos_module
用FPGA实现sos摩尔密码,即输出电平信号短长短。就是有次序的控制输出莫斯密码的“点”,“画”和“间隔”。而 control_module.v 是一个简单的定时触发器,每一段时间都会使能sos_module.v。(Realized by FPGA sos mole password, the output signal level of short duration. There is a sequence of output control points Moss password, painting and intervals. And control_module.v is a simple timer triggers, each period of time will enable sos_module.v.)
- 2016-09-20 16:26:29下载
- 积分:1
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tdc
time to digital convertor
- 2011-09-22 16:25:50下载
- 积分:1
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Source
I2C 控制器的 Verilog源程序2(I2C controller Verilog source 2)
- 2008-12-10 16:05:13下载
- 积分:1
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ml505_mig_design
Xilinx开发板ML505的DDRII示例程序,使用Verilog,调用MIG,编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)
- 2010-05-13 02:39:04下载
- 积分:1
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SOS
使用matlab生成SOS滤波器,应用于FPGA的一个小型系统,有一定的参考价值(Using MATLAB to generate SOS filter, applied to a small system of FPGA, there is a certain reference value)
- 2016-07-31 20:53:19下载
- 积分:1