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carry_lookahead_add4
4位的超前进位加法器，门级电路连接得到，verilog代码实现(4-bit look-ahead adder, gate-level circuit)
- 2011-10-18 21:40:20下载
- 积分：1
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sd_slave_device
verilog source code for SD card SLAVE DEVICE IP-Core
- 2021-04-12 22:18:56下载
- 积分：1
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3FP
一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)
- 2013-08-25 00:41:29下载
- 积分：1
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Vhdl_Programming_Example
vhdl编程语言电子书，英文的，有很多例子(VHDL programming language e-books, in English, there are many examples of)
- 2009-01-16 20:59:00下载
- 积分：1
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Uart2Sdram2TFT_sobel
说明： 使用FPGA实现sobel边缘检测的图像处理算法，更改后可直接使用在自己的系统上。(FPGA is used to implement the image processing algorithm of Sobel edge detection, which can be directly used in its own system after change.)
- 2019-12-30 19:40:45下载
- 积分：1
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一款240＊128的LCD模块在ALTERA FPGA NIOS中的应用，自己写的AVALON总线IP，包括所有源码，可轻松用于NIOS中，供大家参考...
一款240＊128的LCD模块在ALTERA FPGA NIOS中的应用，自己写的AVALON总线IP，包括所有源码，可轻松用于NIOS中，供大家参考-A 240* 128 LCD module in the ALTERA FPGA NIOS application, write your own AVALON Bus IP, including all source code can be easily used in NIOS for reference
- 2022-07-03 08:05:54下载
- 积分：1
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here is realized simple FIFO stack in vhdl.
very simple example, but very help...
here is realized simple FIFO stack in vhdl.
very simple example, but very helpful.
- 2022-03-12 07:44:59下载
- 积分：1
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mac
基于网口的收发数据及解析数据内容的verilog代码实现(Based on the Internet port to send and receive data and parse the contents of the data verilog code)
- 2017-04-24 10:13:55下载
- 积分：1
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motor
步进电机驱动，32等级速度，带加减速度控制。verilog编写。(step motor driver,32 level speed.)
- 2020-12-09 16:29:19下载
- 积分：1
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mini_cpu_verilog
用verilog写的简单的CPU，有详细注释(Use verilog to write a simple CPU, with detailed notes)
- 2011-07-16 09:20:27下载
- 积分：1
