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tlc5615
TLC5615串行DA的驱动接口,采用verilog编程(TLC5615 driver DA serial interface using verilog programming)
- 2009-04-27 11:59:22下载
- 积分:1
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04432909
基于FPGA实现的神经网络算法ANN。针对手势识别,不错的参考文章。(Hand Postures Recognition System Using Artificial Neural Networks
Implemented in FPGA)
- 2015-06-25 06:34:19下载
- 积分:1
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VHDL
产生svpwm波形,可以参考下载,以便学习交流(gennerate SVPWM wave)
- 2017-11-21 15:38:29下载
- 积分:1
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QPSK_System
实现QPSK系统的调制解调仿真,基带成形滤波器采用升余弦滚降滤波器,将仿真的误码率与理论误码率作了比较(Implement QPSK modulation and demodulation simulation system, the baseband shaping filter using Raised Cosine filter will BER simulation were compared with the theoretical BER)
- 2020-12-22 15:39:07下载
- 积分:1
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VHDL硬件描述语言作业
VHDL硬件描述语言作业-VHDL hardware description language operations
- 2022-03-19 16:26:25下载
- 积分:1
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FSK
2FSK的matlab仿真,叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)
- 2021-04-13 02:58:56下载
- 积分:1
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FIR滤波器的基本Verilog代码实现
FIR filter basic verilog code for implementation-FIR filter basic verilog code for implementation
- 2022-03-31 20:42:11下载
- 积分:1
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uart(可综合)
说明: 【实例简介】用Verilog实现uart串口协议,波特率可选9600、19200、38400、115200。8位数据为,1位校验位,1位停止位。
【实例截图】
【核心代码】核心代码包括TX,RX,Baud,FIFO([example introduction] UART serial port protocol is implemented with Verilog, and the baud rate can be 9600, 19200, 38400, 115200. 8-bit data, 1 bit check bit, 1 stop bit.
[example screenshot]
[core code] the core code includes TX, Rx, baud and FIFO)
- 2020-12-08 16:00:16下载
- 积分:1
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ppm_tb
PPM编码器的测试文件,可以测试PPM编码是否正确(PPM encoder test file, you can test whether the correct PPM encoding)
- 2013-11-20 12:32:16下载
- 积分:1
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基于Xilinx fpga的ddr2 控制器设计方法
基于Xilinx fpga的ddr2 控制器设计方法-Xilinx fpga-based controller design method of ddr2
- 2022-08-11 18:36:22下载
- 积分:1