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xapp1251
1. REVISION HISTORY
2. OVERVIEW
3. SOFTWARE TOOLS AND SYSTEM REQUIREMENTS
4. DESIGN FILE HIERARCHY
5. INSTALLATION AND OPERATING INSTRUCTIONS
6. SUPPORT
- 2020-11-07 09:49:49下载
- 积分:1
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generic_dpram
IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY
- 2013-09-30 19:03:40下载
- 积分:1
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xilinx-timing-constrains
ISE时序约束笔记——Global Timing Constraints,这个文档中详细介绍了如何使用ISE中约束工具和原理,对fpga水平提高有很大帮助(In this file , global timing constraints is introduced very clearly. It can really helps)
- 2012-04-16 11:08:45下载
- 积分:1
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lpddr2
LPDDR2 SDRAM memories compliant to JEDEC JESD209-2.
- 2015-05-11 20:57:21下载
- 积分:1
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SVPWM_method
给出了SVPWM算法的详细FPGA实现方法!(A detailed FPGA SVPWM algorithm to achieve the method!)
- 2017-04-05 13:43:14下载
- 积分:1
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是verilog例子。初级适用。包括了简单的例子。
是verilog例子。初级适用。包括了简单的例子。-example. The initial application. Including a simple example.
- 2022-05-31 23:36:48下载
- 积分:1
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pll
用FPGA实现数字锁相环,开发环境为ISE(Using FPGA digital phase-locked loop, development environment for ISE)
- 2021-03-19 18:29:19下载
- 积分:1
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一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码
一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码-VerilogHDL language based on the 16-bit multiplier of the booth algorithm and test code
- 2022-02-07 12:03:36下载
- 积分:1
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verilog编写的alu模块
verilog编写的alu模块-Verilog modules prepared by the ALU
- 2022-11-20 13:50:03下载
- 积分:1
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Verilog计数器、编码器、加法器
说明: verilog编码器、计数器、加法器的程序(Verilog encoder, counter, adder procedures)
- 2019-01-26 21:50:01下载
- 积分:1