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A VHDL design with the use of powerful 32
一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.
- 2022-08-10 06:36:50下载
- 积分：1
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Quartusrs232
串口通讯，与硬件联通调试过，收发程序是分开的。(Serial Communication)
- 2009-05-04 14:53:06下载
- 积分：1
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arp_2
rgmii接口通讯方式，用于FPGA以太网口开发(Rgmii interface communication mode)
- 2018-11-09 21:56:27下载
- 积分：1
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step-motor
how to use step motor
control
- 2013-02-04 13:12:25下载
- 积分：1
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zixiechengxu
用verilog编写的包含有与DSP通信，三电平svpwm实现的程序，(Written in verilog contains communicate with the DSP, three-level svpwm realize the procedures)
- 2021-04-18 15:28:51下载
- 积分：1
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CH4CH2CH1VHDL 数字电路参考书所有程序9
CH4CH2CH1VHDL 数字电路参考书所有程序9-CH4CH2CH1VHDL digital circuit reference all proceedings 9
- 2022-11-24 11:15:04下载
- 积分：1
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interpolator
说明： 插值滤波器,用于音频解码调制解调,滤波器系数用移位相加实现(Interpolation filter, audio decoder for modulation and demodulation, filter coefficient shift combined with the realization of)
- 2008-10-21 12:49:38下载
- 积分：1
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ram_dp_sr_sw[1]
dual port ram control (dual port ram control dual port ram control dual port ram control)
- 2011-06-07 10:47:03下载
- 积分：1
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m_xulie
在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)
- 2013-09-26 11:30:47下载
- 积分：1
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design of 1-bit memory using cmos logic
&单元格
- 2022-02-04 02:43:34下载
- 积分：1
