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本设计是针对LEON3 Altera Nios II startix2
This leon3 design is tailored to the Altera NiosII Startix2
Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM.
As of this time, the DDR interface only works up to 120 MHz.
At 130, DDR data can be read but not written.
NOTE: the test bench cannot be simulated with DDR enabled
because the Altera pads do not have the correct delay models.
* How to program the flash prom with a FPGA programming file
1. Create a hex file of the programming file with Quartus.
2. Convert it to srecord and adjust the load address:
objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec
3. Program the flash memory using grmon:
flash erase 0x800000 0xb00000
flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2
Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM.
As of this time, the DDR interface only works up to 120 MHz.
At 130, DDR data can be read but not written.
NOTE: the
- 2022-05-18 19:00:04下载
- 积分：1
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altera嵌入式设计大赛文章，车载cots设计实现
altera嵌入式设计大赛文章，车载cots设计实现-Embedded Design Contest altera article, cots Car Design
- 2022-05-20 14:21:28下载
- 积分：1
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Fitz_algorithm
QPSK调制的载波频偏估计，是一个可以调用的函数。接收端进行了一系列的处理。经典的Fitz法(QPSK-carrier frequence offset estimation_ Fitz)
- 2013-03-18 14:37:56下载
- 积分：1
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gpmc_fpga
实现arm与fpga之间通过gpmc总线通信(the device of fpga)
- 2015-10-27 16:44:25下载
- 积分：1
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CY7C63723
CY7C63723 功能及其引脚描述，外围电路和仿真数据(The CY7C637 is an 8-bit RISC OTP microcontroller.)
- 2009-07-13 14:30:05下载
- 积分：1
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8051_VHDL
mc8051代码，里面功能齐全，调试方便(mc8051 code, inside a full-featured, easy debugging)
- 2008-03-28 14:54:19下载
- 积分：1
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这是“状态机设计（讲稿）”，希望对正在学VHDL的同学有帮助，谢谢！...
这是“状态机设计（讲稿）”，希望对正在学VHDL的同学有帮助，谢谢！-This is the "state machine design (the script)", and I hope to learn VHDL is there to help the students, thank you!
- 2022-11-16 16:25:03下载
- 积分：1
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增强的音频工程
Enhanced Audio Project
by
Dixie Xue & Wei Zhang
-Enhanced Audio Project
by
Dixie Xue & Wei Zhang
- 2022-08-26 07:09:41下载
- 积分：1
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autosell-verilog
实现简单自动售货机的基本功能。投币找零功能，并用Led数码管显示，输出结果用Led显示。(Basic functions simple vending machines. Coin change for function and use Led digital tube display, the output display Led.)
- 2014-07-26 21:50:07下载
- 积分：1
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Code
用于数字积分器的设计，主要涉及VHDL、Verilog等FPGA编程语言。(Design of Digital Integrator)
- 2011-11-23 21:31:03下载
- 积分：1
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