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Verilog--Fourth-Edition
FPGA开发必备工具书,适合初学者。语法、范例讲的都很详细,是一部不错的工具书。(Verilog hardware description language Fourth Edition)
- 2015-09-30 12:34:50下载
- 积分:1
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设计与表征的并行前缀加法器使用 Fpga
并行前缀加法器(也被称为carrytree
- 2022-10-09 12:20:02下载
- 积分:1
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verilog经典设计实例
学习verilog过程中总结的54个经典设计实例,供verilog初学者入门学习,掌握编程技巧。实例包括:计数器、加法器、数据寄存器、锁存器、进程函数,以及小型工程项目如交通信号灯系统,乐曲演奏,简单编码器等设计实例。
- 2023-03-14 22:55:03下载
- 积分:1
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ALU_verilog
用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件(Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document)
- 2008-08-15 11:36:51下载
- 积分:1
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Reread-machine-program
通过凌阳16位单片机实现复读机的应用的程序。(By Sunplus 16-bit MCU repeater application process.)
- 2011-07-30 16:09:07下载
- 积分:1
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DDS-Waveform-generator
采用FPGA实现的DDS波形发生器源码,可以实现频率幅值变换、正弦波、方波、三角波输出,输出频率可达1MHz(FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz)
- 2012-06-29 23:20:58下载
- 积分:1
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uart-for-fpga
说明: Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分:1
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verilog实现千兆以太网UDP传输
verilog实现千兆以太网udp传输,具有发送和接收功能。同时有CRC校核代码。学习FPGA的很好的参考资料,值得大家下载。
- 2022-02-04 05:21:49下载
- 积分:1
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gmsk
说明: 利用fpga实现gmsk的调制并仿真,全部代码(Fpga implements gmsk)
- 2020-12-24 00:09:06下载
- 积分:1
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vhdl_course_tw_CIC
台湾IC中心VHDL讲义,内容详细,适合IC前端设计参考(Taiwan s IC Center VHDL handouts, detailed reference design for front-end IC)
- 2011-01-10 19:06:38下载
- 积分:1