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GAL16V8(fangzhen74LS138)
GAL16V8(仿真74LS138),试验通过。包括able及jed文件。对pcb印板设计时,对简化走线特别有用。简单的修改GAL16V8程序,可灵活地进行地址译码修改。(GAL16V8 (simulation 74LS138), test passed. Including the able and jed file. Printed on the pcb board design, especially useful to simplify alignment. Simple modifications GAL16V8 program, the flexibility to change the address decoding.)
- 2011-01-26 20:43:01下载
- 积分:1
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e2
Any change to the value of Mresults in immediate and phase-continuous changes in the output frequency
- 2014-02-23 02:42:47下载
- 积分:1
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FPGA-timing-constraints
基于Verilog的FPGA设计时序分析约束详细解释与使用方法(FPGA timing constraints)
- 2017-04-24 09:54:35下载
- 积分:1
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06042349
Dynamic Power Management for the Iterative Decoding of Turbo Codes
- 2014-04-04 15:03:28下载
- 积分:1
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demo
NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)
- 2013-07-19 11:17:29下载
- 积分:1
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M_M
此为数学形态滤波器消燥的代码,用于一维信号,涉及一个具体的例子,需要的话可以自己修改,修改相应的结构元素。(This is a mathematical morphology filter away dry code, used to one dimensional signal, involving a concrete example, necessary can change ourselves, change the structure of the corresponding elements)
- 2013-08-29 21:36:37下载
- 积分:1
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based on VHDL development of the I486 bus interface procedures. Implementation o...
基于VHDL语言开发的I486总线接口程序。实现了一个三态的总线,可保证数据的正常传输。-based on VHDL development of the I486 bus interface procedures. Implementation of a three-state bus can ensure that the normal data transmission.
- 2023-05-12 23:40:03下载
- 积分:1
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izhihuangenzongPWMnb
三相电流滞环跟踪PWM逆变器。逆变电路负载电流与指令电流比较产生PWM波形。经验证可很好实现功能。(The three-phase hysteresis current tracking PWM inverter. Load current command current of the inverter circuit generating a PWM waveform. Proven functions well.)
- 2012-11-26 11:56:56下载
- 积分:1
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20190717 - Copy
说明: this describes building spi block on verilog hdl and programming them on an fpga device
- 2020-06-21 21:40:02下载
- 积分:1
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采用低功率乘法器与加法器的低功耗 FIR 滤波器
本文提出了降低动态功耗有限 Imppulse 跃 (FIR) 数字滤波器的方法这些方法包括低功耗串行乘法器和串行加法器、 移位/添加的乘数,折叠组合展位乘数线性相位结构的改造和应用对 fir 滤波器,以减少功率引致此干扰的消耗也是减少。最小的功率,实现是在基于 8taps 和 8bits 的投入在 100 MHZ 转变/添加乘数 fir 滤波器的功率为 110mw 和 8bits 系数。拟议的 FIR 滤波器,合成了采用 Xilinx ISE 斯巴达 3E FPGA 和权力分析了使用 Xilinx XPower 分析器。
- 2022-08-07 20:59:03下载
- 积分:1