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pinlvji
使用FPGA测量频率大小,并且在数码管上进行显示(Frequency measurement using FPGA and display on digital tube)
- 2020-06-18 10:20:02下载
- 积分:1
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13.2_MotionDetec
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,基于视频的运动检测(System Generator based image processing engineering, multimedia processing on FPGA source code, based on video motion detection)
- 2020-10-23 20:57:22下载
- 积分:1
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VHDL电子钟的设计
(1)用HDL设计一个多功能数字钟,包含以下主要功能:精确计时,时间可以24小时制或12小时制显示;
(2)日历:显示年月日星期;
(3)能用QuartusII软件仿真;
- 2022-08-02 23:44:59下载
- 积分:1
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ddr3control
8位突发长度,一次64bit数据读写,MIG核(DDR3 controll implimention)
- 2021-05-07 13:58:36下载
- 积分:1
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vhdl语言描述分频器,实现2、4、8、16……分频,经过实践
vhdl语言描述分频器,实现2、4、8、16……分频,经过实践-description language VHDL divider, 2,4,8,16 ... ... realize frequency, through the practice of
- 2022-10-30 11:40:03下载
- 积分:1
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EP3C16_Nios_MMA7455
实现基于NIOS的 EP3C16与加速度传感器NMA7455的IIC基本通信(Realization of based on NIOS EP3C16 and acceleration sensor NMA7455 IIC of basic communication
)
- 2013-01-29 13:22:50下载
- 积分:1
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FPGA core code, can be directly used in engineering.
FPGA核心代码,可在工程中直接使用。-FPGA core code, can be directly used in engineering.
- 2022-12-24 15:05:09下载
- 积分:1
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Traffic_RYG
交通灯的控制,分主干道和从路交通灯,主路优先,正常情况下,绿灯60s,红灯30S,黄灯5S(Traffic light control)
- 2020-06-21 06:40:02下载
- 积分:1
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Motion_control
基于FPGA的运动控制系统设计,包含位置、速度控制等(motion control)
- 2020-11-29 13:09:28下载
- 积分:1
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二进制神经网络(BNN)bnn-fpga-master
说明: bnn-fpga是FPGA上CIFAR-10的二进制神经网络(BNN)加速器的开源实现。 加速器针对低功耗嵌入式现场可编程SoC,并在Zedboard上进行了测试。 在编写CIFAR-10测试集中的10000张图像时,错误率是11.19%。(bnn-fpga is an open-source implementation of a binarized neural network (BNN) accelerator for CIFAR-10 on FPGA. The architecture and training of the BNN is proposed by Courbarieaux et al. and open-source Python code is available. Our accelerator targets low-power embedded field-programmable SoCs and was tested on a Zedboard. At time of writing the error rate on the 10000 images in the CIFAR-10 test set is 11.19%.)
- 2020-07-27 07:02:34下载
- 积分:1