-
This is what I did do a UART transmitter when the source and hope for all of us.
这是我做UART时候做的一个发送器的源码，希望对大家有用。-This is what I did do a UART transmitter when the source and hope for all of us.
- 2022-03-25 00:51:09下载
- 积分：1
-
LFM
说明： 该程序使用Verilog语言产生LFM信号(The program uses Verilog language to generate LFM signals.)
- 2021-04-19 09:38:51下载
- 积分：1
-
ieee
VLSI Implementation IEEE Papers 2010 to 2014
- 2014-07-08 03:52:41下载
- 积分：1
-
HYG32024032T-bT62L-VA
此为华远显示320*240LCD驱动程序，该程序也适用于带RA8806控制器的LCD(This is the Huayuan display 320* 240LCD driver, the program also applies with RA8806 LCD controller)
- 2013-06-08 16:12:53下载
- 积分：1
-
dianyuan
saber的仿真模型，是一个电源的，经过调试已经成功(The simulation model of the saber, is a power, after commissioning has been successfully)
- 2012-04-06 12:17:23下载
- 积分：1
-
multiply_8_VHDL
由8 位加法器构成的以时序方式设计的8 位乘法器，采用逐项移位相加的方
法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件，运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
- 2014-04-11 16:58:04下载
- 积分：1
-
LZ77_1
Package include hardware implementation of Lz77 algorithm
- 2021-04-26 10:38:45下载
- 积分：1
-
mutiplier
说明： 用VHDL语言仿真乘法器设计, 经过modelsim仿真， synplify综合，并下载进FPGA验证(Multiplier design using VHDL, simulation, after modelsim simulation, synplify synthesis, and downloaded into a FPGA verification)
- 2009-08-28 13:28:04下载
- 积分：1
-
turbo[1].tar
turbo码的verilog程序，有意者请下载。(turbo code verilog procedures Interested parties please download.)
- 2021-01-14 17:58:46下载
- 积分：1
-
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考....
Clock_Dithering_Verilog this is a Clock u_dither, 大家想要做Verilog去抖动的可以参考.-Clock_Dithering_Verilog this is a Clock u_dither, everybody want to make Verilog-jitter can refer to.
- 2022-12-08 19:40:03下载
- 积分：1
