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svtb_ahb_sram
说明： 一款verilog设计的SRAM控制器，可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)
- 2020-06-30 13:40:02下载
- 积分：1
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VHDL for the hardware interface on the 8237 programming, you can carrying out fp...
关于vhdl对硬件接口8237的编程，可以在进行fpga/cpld设计是作为模块用到-VHDL for the hardware interface on the 8237 programming, you can carrying out fpga/cpld design is used as a module
- 2023-02-20 14:55:04下载
- 积分：1
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modulation-and-demodulation
调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。(FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and demodulation, QPSK modulation and demodulation, PPM modulation and demodulation verilog source code .)
- 2021-04-09 09:29:01下载
- 积分：1
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sdram
数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分：1
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(15-7-2)BCH
Verilog HDL 语言编写的（15，7,2）BCH编码和译码功能(Verilog HDL language (15,7,2) BCH encoding and decoding functions)
- 2020-10-29 11:19:57下载
- 积分：1
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基于basys3的推箱子游戏
基于FPGA的游戏实例，开发板为Xilinx的basys3，VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)
- 2021-03-12 13:09:25下载
- 积分：1
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MAX48_cn
MAX481、MAX483、MAX485、MAX487-MAX491以及
MAX1487是用于RS-485与RS-422通信的低功耗收发器，
每个器件中都具有一个驱动器和一个接收器(The MAX481, MAX483, MAX485 The MAX487-MAX491, and MAX1487 low-power transceivers for RS-485 and RS-422 communication, each device has a drive and a receiver)
- 2012-07-10 21:28:46下载
- 积分：1
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EDA
十进制计算机，实现十进制计数功能，简单可靠(vhdl)
- 2009-12-26 21:45:43下载
- 积分：1
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几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码
几个VHDL的源代码和和一个本人编写的5级流水线RISC CPU的代码-several VHDL source code, and in my preparation of a five pipelined RISC CPU code
- 2023-05-10 01:55:03下载
- 积分：1
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ads8361_avl
Interface for ADS8361 TI ADC
IP Core for ALTERA NIOS2
- 2013-04-04 16:12:13下载
- 积分：1
