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FIRDF_design
FIR带通、带阻滤波器设计,需要输入截止频率以及容许偏差。(FIR band pass and band stop filter design)
- 2020-09-28 15:17:44下载
- 积分:1
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turbo
详细讲述TURBO码的FPGA实现原理,可作参考,不是码源(A detailed account of the FPGA implementation of principle of the TURBO code can be used as reference, not source code)
- 2012-05-01 13:12:59下载
- 积分:1
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vhdl 基于ADC0809 A/D转换控制器的设计实验
vhdl 基于ADC0809 A/D转换控制器的设计实验-vhdl ADC0809
- 2022-02-25 21:38:23下载
- 积分:1
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FPGA
FPGA的学习指南,绝对经典,内容比较超值,我已经细心读过了,讲解清晰,快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
- 2023-07-28 14:25:03下载
- 积分:1
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EX11_RS232
F2812串口通信,用于串口通信时使用,可以在线调整(F2812 serial communication, is used for serial communication can be adjusted online)
- 2013-05-23 14:58:33下载
- 积分:1
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数控分频的一个工程
数控分频的一个工程---包括vhdl源程序和编译后产生的相关文件-CNC dividing frequency of a project- including VHDL source code and compile the relevant documents after
- 2022-05-22 23:30:57下载
- 积分:1
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sampleverilog
图像采集、存储控制verilog源代码(Image acquisition, storage, control of Verilog source code)
- 2021-04-15 22:28:54下载
- 积分:1
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fft-matlab
FFT的MATLAB实现。非常完整的实现FFT过程,速度很快。(The FFT in MATLAB. Contains more than one source, the FFT process. Learning Reference essential)
- 2012-10-27 16:07:24下载
- 积分:1
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CODE_VHDL_COUNTING 0 到 9,使用按钮 (Đếm 慈 0 đến 9 hiển 施耐 1 带领 7 đoạn sử dụng nút nhấn để điều khiển)
CODE_VHDL_COUNTING 0 到 9,使用按钮 (Đếm 慈 0 đến 9 hiển 施耐 1 带领 7 đoạn sử dụng nút nhấn để điều khiển)
Với bài này tôi sử dụng một nút nhất để một nút nhấn đế bắt đầu đếm dữ liệu 将重置。
- 2022-07-25 16:14:59下载
- 积分:1
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使用Veriolog hdl 编写手机屏测试程序.
使用Veriolog hdl 编写手机屏测试程序.-Veriolog hdl prepared to use cell phone screen test.
- 2023-04-25 00:20:03下载
- 积分:1