-
jk
说明： 基于quartus2的jk触发器设计，内含源码和仿真图(Jk flip-flop design based on the quartus2, containing source code and simulation diagram)
- 2011-11-24 10:47:56下载
- 积分：1
-
SASX
说明： Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分：1
-
利用数字电路知识，进行二十四小时计时，并有闹钟与蜂鸣器功能...
利用数字电路知识，进行二十四小时计时，并有闹钟与蜂鸣器功能-Knowledge of the use of digital circuits, the 24 hours time, and there is an alarm clock function and buzzer
- 2023-03-19 20:00:03下载
- 积分：1
-
VHDL语言描述的二进制十进制译码电路，已经编译完成
VHDL语言描述的二进制十进制译码电路，已经编译完成-Binary decimal decoder circuit
- 2022-02-22 00:13:01下载
- 积分：1
-
descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve...
cm12864液晶显示器的vhdl驱动代码，基于状态机的转换，实现显示功能。-descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve the display function.
- 2022-12-01 22:05:03下载
- 积分：1
-
LMP
利用LMP的20bit counter,比自带的cout进位要快的多。已经同错综合和时序仿真。-LMP
- 2022-01-25 18:35:46下载
- 积分：1
-
Based on quartus a 3
基于quartus的3-8译码器,可作为大型系统的译码器模块-Based on quartus a 3-8 decoder can be used as large-scale system decoder module
- 2022-03-14 15:00:50下载
- 积分：1
-
基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现...
基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现
-FPGA-based design of traffic lights have Verilog HDL source code, simulation map with pin configuration map has been downloaded realize
- 2022-06-27 19:08:32下载
- 积分：1
-
FPGA-powe-analysis-tool-EPE
FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)
- 2012-11-19 17:08:00下载
- 积分：1
-
DE2_CCD_sobel
通过摄像头图像的提取，在FPGA开发板上实现的，主要实现了图像轮廓的提取(Extraction of the image through the camera, in the FPGA implementation of the development board, the main achievement of the image contour extraction)
- 2020-07-22 17:48:45下载
- 积分：1
