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VHDL语言写的频率计的程序，内带完整的技术报告
VHDL语言写的频率计的程序，内带完整的技术报告-VHDL write the frequency of procedures, brought integrity of the technical report
- 2022-02-20 00:46:02下载
- 积分：1
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FPGA design of the guiding principles, it is classic! Want to give everyone easy
FPGA设计的指导原则，很经典的！希望给大家方便-FPGA design of the guiding principles, it is classic! Want to give everyone easy
- 2023-03-11 18:40:04下载
- 积分：1
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cpu-maxplus
MaxplusII编写的简易cpu，可实现简单加减法等操作(MaxplusII summary prepared by the cpu can realize simple addition and subtraction, etc)
- 2007-06-08 17:55:10下载
- 积分：1
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shudianshiyan
数字电路与逻辑设计实验编程，包含多功能电子钟程序，实用，简易(Digital circuits and logic design experiments programming, including multi-function electronic clock procedures, practical, simple)
- 2011-07-07 08:52:13下载
- 积分：1
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hamid
very nice program that i ensure anyone can use easily and will be efficient for hard project of elevator
- 2009-07-26 13:27:38下载
- 积分：1
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这是用VHDL实现的8位加法器，对新手有点帮助。
这是用VHDL实现的8位加法器，对新手有点帮助。-This is achieved using VHDL adder 8, a little help to novices.
- 2022-07-20 21:54:41下载
- 积分：1
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VHDL
说明： 运用VHDL描述函数发生器的各个波形，可有构成多功能函数发生器。(VHDL description of the use of various function generator waveforms, can constitute a multi-purpose function generator.)
- 2009-08-18 16:54:24下载
- 积分：1
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这是DES的Verilog源代码（数据加密标准）是用来在N.
This is verilog source code for DES(Data Encryption standard) which is used in network security.
- 2022-04-21 02:32:09下载
- 积分：1
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ALTERA嵌入式设计大赛获奖作品文章，非常适合DE2开发参考
ALTERA嵌入式设计大赛获奖作品文章，非常适合DE2开发参考-ALTERA Embedded Design Competition Prize-winning article, very suitable for the development of reference DE2
- 2022-04-07 11:00:16下载
- 积分：1
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EMIF
EMIF接口调试代码，使用的是Verilog语言，FPGA与DSP通信，测试成功(EMIF interface debugging code that USES the Verilog language, FPGA and DSP communication, testing success)
- 2020-12-04 10:39:24下载
- 积分：1
