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zhaozhou_verilog
usb3.0 物理层仿真,verilog编程(Start the physical simulation)
- 2014-04-04 11:49:09下载
- 积分:1
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Verilog HDL
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- 2023-03-01 03:55:03下载
- 积分:1
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upp 接口,verilog
FPGA之间通信,或者FPGA和DSP之间通信的接口协议,用verilog代码编写,验证可用!
- 2022-05-05 12:14:52下载
- 积分:1
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wbm
用walsh算法实现的符号数乘法器,asic流片时,可以不用公司的付费乘法器的ip core.(algorithm using the symbols multiplier, HDL-piece quantities. it is not necessary for the company's paid Multiplier ip core.)
- 2006-07-12 14:49:35下载
- 积分:1
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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分:1
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verilog
用fpga制作一个音乐播放器,此为浙江大学信电系fpga教程大实验成果。(Use fpga make a music player, this is the letter Electrical Zhejiang University fpga tutorial big experiment results.)
- 2020-12-14 09:09:14下载
- 积分:1
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rs-codec(255-223)
RS编码是一种纠错码,本程序实现RS(255,223)用FPGA 实现RS编码,程序在Quartus II中调试通过。(RS coding is an error-correcting codes, the procedures for the realization of RS (255,223) with FPGA realization of RS codes, in the Quartus II program through the debugger.)
- 2021-05-13 00:30:02下载
- 积分:1
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AHB总线系统的设计和仿真
资源描述详细的阅读了AHB协议规范,采用Verilog硬件描述语言,按照协议要求设计主机与从机。时序仿真通过。在压缩包里附有该设计的验证程序。
- 2022-03-24 01:13:49下载
- 积分:1
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基于同步FIFO的异步串口通信发送机的设计与实现
资源描述该程序是在同步FIFO的基础上实现了异步串口通信发送机的功能,首先通过数据产生模块产生数据缓存到FIFO中,然后UATR的tx模块通过检测FIFO中的数据,并将数据发送出去。
- 2023-07-24 03:00:03下载
- 积分:1
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DDS_AD9910
说明: 用 AD9910实现的DDS 线性调频信号,调试已通过 可以使用(DDS LFM signal realized by ad9910 has passed debugging and can be used)
- 2019-10-23 15:36:06下载
- 积分:1